參數(shù)資料
型號: PDI1394L11
廠商: NXP Semiconductors N.V.
英文描述: 1394 AV Link Layer Controller(AV(音頻/視頻)鏈接層控制器)
中文描述: 1394影音鏈路層控制器(視聽(音頻/視頻)鏈接層控制器)
文件頁數(shù): 33/46頁
文件大?。?/td> 294K
代理商: PDI1394L11
Philips Semiconductors
Product specification
PDI1394L11
1394 AV link layer controller
1997 Oct 21
33
13.2.4
The AV Transmitter Interrupt Control and Status register is the interrupt register for the AV transmitter.
Isochronous Transmitter Interrupt Acknowledge (ITXINTACK) – Base Address: 0x02C
Bits 2, 3, and 4 ”auto repair” themselves, i.e. AVLINK will detect the situation and attempt to recover on its own. The host controller still needs to
clear these interrupts to be alerted the next time.
29 28 272625 24 23 22 212019 18 1716 15 1413 12 11 10 9 8 7 6 5 4 3 2 1 0
D
I
I
D
I
T
T
P
I
I
D
I
E
S
SV00282
3130
Reset Value 0x00000000
Bits 6 .. 0 are interrupt acknowledge bits; and are defined as:
R/W
TRMSYT: Interrupt on transmission of a SYT in CIP header quadlet 2
R/W
TRMBP: Interrupt on payload transmission/discard complete.
R/W
DBCERR: Acknowledge interrupt on Data Block Count (DBC) synchronization loss.
R/W
INPERR: Acknowledge interrupt on input error (input data discarded).
R/W
DISCARD: Interrupt on lost cycle (payload discarded).
R/W
ITXFULL: Interrupt on isochronous memory bank full. This is a fatal error, the recommended action is to reset and
re-initialize the transmitter.
R/W
ITXEMPTY: Interrupt on isochronous memory bank empty.
Other bits will always read ‘0’.
Bit 6:
Bit 5:
Bit 4:
Bit 3:
Bit 2:
Bit 1:
Bit 0:
13.2.5
These are the enabled bits for the AV Transmitter Control.
Isochronous Transmitter Interrupt Enable (ITXINTE) – Base Address: 0x030
29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
8
7
6
5 4
3
2 1
0
E
E
E
E
E
E
E
P
I
I
D
I
E
S
31 30
SV00793
Reset Value 0x00000000
Bits 6..0 are interrupt enable bits for the Isochronous Transmitter Interrupt Acknowledge register (ITXINTACK).
13.2.6
Isochronous Transmitter Control Register (ITXCTL) – Base Address: 0x34
29 28 272625 24 23 22 212019 18 1716 15 1413 12 11 10 9 8 7 6 5 4 3 2 1 0
SV00283
TAG
CHANNEL
SPD
SYNC
31 30
Reset Value 0x00000000
Bit 15..14:
R/W
Tag: Tag code to insert in isochronous bus packet header. Should be ‘01’ for IEC 61883 International Standard
data.
Channel: Isochronous channel number.
Speed: Cable transmission speed (S100, S200, S400).
00=100Mbs
01=200Mbs
10=400Mbs
11=reserved
Sync: Code to insert in SY field of isochronous bus packet header.
Bit 13..8:
Bit 5..4:
R/W
R/W
Bit 3..0
R/W
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