參數(shù)資料
型號: PIC16CR7X
廠商: Microchip Technology Inc.
英文描述: 28/40-Pin, 8-Bit CMOS ROM Microcontrollers
中文描述: 28/40-Pin,8位微控制器的CMOS光盤
文件頁數(shù): 139/172頁
文件大小: 1506K
代理商: PIC16CR7X
2007 Microchip Technology Inc.
DS21993C-page 137
PIC16CR7X
FIGURE 15-18:
A/D CONVERSION TIMING
TABLE 15-13: A/D CONVERSION REQUIREMENTS
Param
No.
Sym
Characteristic
Min
Typ
Max
Units
Conditions
130
T
AD
A/D clock period
PIC16CR7X
PIC16CR7X
1.6
2.0
μ
s
μ
s
T
OSC
based, V
REF
3.0V
T
OSC
based,
2.0V
V
REF
5.5V
A/D RC mode
A/D RC mode
PIC16CR7X
PIC16CR7X
2.0
3.0
9
4.0
6.0
6.0
9.0
9
μ
s
μ
s
T
AD
131
T
CNV
Conversion time (not including
S/H time)
(Note 1)
T
ACQ
Acquisition time
132
5*
μ
s
The minimum time is the
amplifier settling time. This
may be used if the “new” input
voltage has not changed by
more than 1 LSb (i.e.,
20.0 mV @ 5.12V) from the
last sampled voltage (as
stated on C
HOLD
).
If the A/D clock source is
selected as RC, a time of T
CY
is added before the A/D clock
starts. This allows the
SLEEP
instruction to be executed.
134
T
GO
Q4 to A/D clock start
T
OSC
/2
*
These parameters are characterized but not tested.
Data in “Typ” column is at 5V, 25
°
C unless otherwise stated. These parameters are for design guidance
only and are not tested.
ADRES register may be read on the following T
CY
cycle.
See
Section 11.1 “A/D Acquisition Requirements”
for minimum conditions.
Note 1:
2:
131
130
132
BSF ADCON0, GO
Q4
A/D CLK
A/D DATA
ADRES
ADIF
GO
SAMPLE
OLD_DATA
Sampling Stopped
DONE
NEW_DATA
(T
OSC
/2)
(1)
7
6
5
4
3
2
1
0
Note 1:
If the A/D clock source is selected as RC, a time of T
CY
is added before the A/D clock starts. This allows the
SLEEP
instruction
to be executed.
1 T
CY
134
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