
Multi-Service Access Device For Channelized Interfaces
Telecom Standard Product Data Sheet
Production
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1990823, Issue 4
67
Pin Name
Type
Pin No.
Function
Timeslot Memory Paging (3 Signals)
ICMP
Input
AU34
Incoming Connection Memory Page.
The incoming
connection memory page select signal (ICMP) controls
the selection of the connection memory page in the two
Incoming Time-Slot Interchange blocks (IWTI, IPTI).
When ICMP is set high, connection memory page 1 is
selected.
When ICMP is set low, connection memory page 0 is
selected. ICMP is sampled at the J0 byte location on
the incoming data buses (ID[4:1][7:0]) when the parallel
TelecomBus interface is selected (SER_EN is logic 0)
or at the J0 byte location as defined by the receive
serial interface frame pulse signal (RJ0FP) when the
serial LVDS interface is selected (SER_EN is logic 1).
Changes to the connection memory page selection is
synchronized to the frame boundary of a later transport
frame as set by the ICMPDLY bit.
ICMP is sampled on the rising edge of SYSCLK.
OCMP
Input
AV34
Outgoing Connection Memory Page.
The outgoing
data bus connection memory page select signal
(OCMP) controls the selection of the connection
memory page in the two Outgoing Time-Slot
Interchange blocks (OWTI and OPTI).
When OCMP is set high, connection memory page 1 is
selected. When OCMP is set low, connection memory
page 0 is selected. OCMP is sampled at the J0 byte
location as defined by the OJ0REF input.
Changes to the connection memory page selection is
synchronized to the transport frame boundary of a later
frame as set by the OCMPDLY bit.
OCMP is sampled on the rising edge of SYSCLK.
RWSEL
Input
AW33
Receive Working Serial Data Select.
The receive
working serial data select signal (RWSEL) selects
between the receive working serial data bus
(RPWRK[4:1]/RNWRK[4:1]) and the receive protection
serial data bus (RPPROT[4:1]/RNPROT[4:1]). This pin
is only used when the LVDS serial interface is enabled
(SER_EN is logic 1) and the RWSEL_EN register bit in
register 0001H is set to logic 1.
When RWSEL is set high, the working serial bus is
selected. When RWSEL is set low, the protection serial
bus is selected. RWSEL is sampled at the J0 byte
location as defined by the receive serial interface frame
pulse signal (RJ0FP). Changes to the selection of the
working and protection serial streams are synchronized
to the J0 byte location of the next frame.
RWSEL is sampled on the rising edge of SYSCLK.