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Multi-Service Access Device For Channelized Interfaces
Telecom Standard Product Data Sheet
Production
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1990823, Issue 4
96
11.24 Transmit Channel Assigner (TCAS-12)
The Transmit Channel Assigner is used to map channel numbers from the Utopia/POS interface
(TADR[5:0] values) into STS-1 timeslots. It also serializes data to interface the TTDP to the
DS3-TRAN blocks.
The TCAS-12 works on an STS-12/STM-4 datastream from an upstream TTDP or TCFP block.
It allows the STS-12/STM-4 data stream from the TTDP or TCFP to be split into DS3, STS-1,
STS-3c/STM-1, and STS-12c/STM-4 channels. STS-48c/STM-16c data streams do not require
processing by the TCAS blocks because no channel division is required.
A TCAS-12 block can assign data streams from one of 12 possible channels. STS-12c/STM-4c
timeslots can be taken from channels 0, 12, 24, and 36. STS-3c/STM-1 timeslots can be from a
range of channels associated with the STS-12 channel which it belongs to. STS-1/STM-0 and
DS3 timeslots can be taken from any channel not already allocated to others but must also reside
within the range of timeslot range allocated to the STS-12 channel to which it belongs to
An STS-48c channel will occupy all timeslots and will be transmitted across 4 RCAS12 blocks.
An STS-48c data stream must be taken from channel 0.
The timeslot mapping on the line side is arbitrary since the OWTI and OPTI blocks can remap the
system side timeslots to any position.
11.25 Transmit Time-sliced Datacom Processor (TTDP)
The Transmit Time-sliced Datacom Processor (TTDP) performs both ATM and PPP/HDLC
processing. It has the capability to process multiple sub-STS-12c/STM-4c channels. It can
handle combinations of DS3, STS-1/STM-0, STS-3c/STM-1 channels with aggregate throughput
up to STS-12/STM-4 rates.
11.25.1 TTDP ATM Processor
In ATM mode, the TTDP performs provides rate adaptation via idle/unassigned cell insertion,
provides HCS generation and insertion, and performs ATM cell scrambling.
Idle/Unassigned Cell Generator
The Idle/Unassigned Cell Generator inserts idle or unassigned cells into the cell stream when
enabled. Registers are provided to program the GFC, PTI, and CLP fields of the idle cell header
and the idle cell payload. The idle cell HCS is automatically calculated and inserted.
Scrambler
The Scrambler scrambles the 48 octet information field. Scrambling is performed using a parallel
implementation of the self-synchronous scrambler (x
43
+ 1 polynomial) described in the
references. The cell headers are transmitted unscrambled, and the scrambler may optionally be
disabled.