參數(shù)資料
型號: PSD813F3V
英文描述: 60V 100kRad Hi-Rel Single P-Channel TID Hardened MOSFET in a UB Surface Mount package; Similar to IRHLUB7970Z4 with optional Total Dose Rating of 300kRads
中文描述: Flash在系統(tǒng)編程(ISP)外設(shè)的8位微控制器
文件頁數(shù): 73/103頁
文件大?。?/td> 1185K
代理商: PSD813F3V
73/103
PSD81XFX, PSD83XF2, PSD85XF2
Table 43. AC Symbols for PLD Timing
Example: t
AVLX
Time from Address Valid to ALE Invalid.
Figure 36. Switching Waveforms – Key
Signal Letters
Signal Behavior
A
Address Input
t
Time
C
CEout Output
L
Logic Level Low or ALE
D
Input Data
H
Logic Level High
E
E Input
V
Valid
G
Internal WDOG_ON signal
X
No Longer a Valid Logic Level
I
Interrupt Input
Z
Float
L
ALE Input
PW
Pulse Width
N
Reset Input or Output
P
Port Signal Output
Q
Output Data
R
WR, UDS, LDS, DS, IORD, PSEN Inputs
S
Chip Select Input
T
R/W Input
W
Internal PDN Signal
B
V
STBY
Output
M
Output Macrocell
WAVEFORMS
INPUTS
OUTPUTS
STEADY INPUT
MAY CHANGE FROM
HI TO LO
MAY CHANGE FROM
LO TO HI
DON'T CARE
OUTPUTS ONLY
STEADY OUTPUT
WILL BE CHANGING
FROM HI TO LO
WILL BE CHANGING
LO TO HI
CHANGING, STATE
UNKNOWN
CENTER LINE IS
TRI-STATE
AI03102
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