PSD81XFX, PSD83XF2, PSD85XF2
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SUMMARY DESCRIPTION
The PSD8XXFX family of memory systems for mi-
crocontrollers (MCUs) brings In-System-Program-
mability (ISP) to Flash memory and programmable
logic. The result is a simple and flexible solution for
embedded designs. PSD8XXFX devices combine
many of the peripheral functions found in MCU
based applications.
Table 1 summarizes all the devices in the
PSD834F2, PSD853F2, PSD854F2.
The CPLD in the PSD8XXFX devices features an
optimized macrocell logic architecture. The PSD
macrocell was created to address the unique re-
quirements of embedded system designs. It al-
lows direct connection between the system
address/data bus, and the internal PSD8XXFX
registers, to simplify communication between the
MCU and other supporting devices.
The PSD8XXFX device includes a JTAG Serial
Programming interface, to allow In-System Pro-
gramming (ISP) of the entire device This feature
reduces development time, simplifies the manu-
facturing flow, and dramatically lowers the cost of
field upgrades. Using ST’s special Fast-JTAG pro-
gramming, a design can be rapidly programmed
into the PSD8XXFX in as little as seven seconds.
The innovative PSD8XXFX family solves key
problems faced by designers when managing dis-
crete Flash memory devices, such as:
– First-time In-System Programming (ISP)
– Complex address decoding
– Simultaneous read and write to the device.
The JTAG Serial Interface block allows In-System
Programming (ISP), and eliminates the need for
an external Boot EPROM, or an external program-
mer. To simplify Flash memory updates, program
execution is performed from a secondary Flash
memory while the primary Flash memory is being
updated. This solution avoids the complicated
hardware and software overhead necessary to im-
plement IAP.
ST makes available a software development tool,
PSDsoft Express, that generates ANSI-C compli-
ant code for use with your target MCU. This code
allows you to manipulate the non-volatile memory
(NVM) within the PSD8XXFX. Code examples are
also provided for:
– Flash memory IAP via the UART of the host
MCU
– Memory paging to execute code across several
PSD8XXFX memory pages
– Loading,
reading,
PSD8XXFX macrocells by the MCU.
and
manipulation
of
Table 1. Product Range (Note 1)
Note: 1. All products support: JTAG serial ISP, MCU parallel ISP, ISP Flash memory, ISP CPLD, Security features, Power Management
Unit (PMU), Automatic Power-down (APD)
2. SRAM may be backed up using an external battery.
Part Number
Primary Flash
Memory
(8 Sectors)
Secondary
Flash Memory
(4 Sectors)
SRAM
2
I/O Ports
Number of
Macrocells
Serial
ISP
JTAG/
ISC Port
Turbo
Mode
Input
Output
PSD813F2
1 Mbit
256 Kbit
16 Kbit
27
24
16
yes
yes
PSD813F3
1 Mbit
none
16 Kbit
27
24
16
yes
yes
PSD813F4
1 Mbit
256 Kbit
none
27
24
16
yes
yes
PSD813F5
1 Mbit
none
none
27
24
16
yes
yes
PSD833F2
1 Mbit
256 Kbit
64 Kbit
27
24
16
yes
yes
PSD834F2
2 Mbit
256 Kbit
64 Kbit
27
24
16
yes
yes
PSD853F2
1 Mbit
256 Kbit
256 Kbit
27
24
16
yes
yes
PSD854F2
2 Mbit
256 Kbit
256 Kbit
27
24
16
yes
yes