參數(shù)資料
型號(hào)： Q67107-H5167-A703
廠商： SIEMENS AG
英文描述： DDC-PLUS-Deflection Controller
中文描述： DDC的加偏轉(zhuǎn)控制器
文件頁數(shù)： 5/47頁
文件大?。?/td> 237K
代理商： Q67107-H5167-A703
P-MQFP-44-2
Semiconductor Group
5
1998-02-01
DDC-PLUS-Deflection Controller
SDA 9361
MOS
Type
SDA 9361
Ordering Code
Q67107-H5167-A703
Package
P-MQFP-44-2
1
Overview
1.1
Deflection - Protection - 16:9 / 4:3
No external clock needed
Φ
1
PLL and
Φ
2
PLL on chip
Ι
2
C-Bus alignment of all deflection parameters
All EW-, V- and H- functions
PW EHT compensation
PH EHT compensation
Compensation of H-phase deviation (e.g. caused by white bar)
Upper/lower EW-corner correction separately adjustable
V-angle correction: Vertical frequent linear modulation of H-phase
V-bow correction: Vertical frequent parabolic modulation of H-phase
Three reduced V-scan modes (75 %, 66 %, 50 % V-size) adjustable by only 2 Bits
H-frequent PWM output signal for general purpose
H- and V-blanking time adjustable
Partial overscan adjustable to hide the cut off control measuring lines in the
reducedscan modes
Stop/start of vertical deflection adjustable to fill out the 16/9 screen with different
letterbox formats without annoying overscan
Control signal SCAN as reference for vertical positioning of OSD, PIP etc.
Vertical noise reduction with memory
Standard and doubled line frequencies for NTSC and PAL, MUSE standard,
ATV standard, HDTV standard
Self adaptation of V-frequency/number of lines per field between 192 and 680 for each
possible line frequency
Protection against EHT run away (X-rays protection)
Features
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