參數(shù)資料
型號: RIVA128ZX
廠商: 意法半導(dǎo)體
英文描述: 128-BIT 3D MULTIMEDIA ACCELERATOR
中文描述: 128位3D多媒體加速器
文件頁數(shù): 38/85頁
文件大?。?/td> 609K
代理商: RIVA128ZX
128-BIT 3D MULTIMEDIA ACCELERATOR
RIVA128ZX
38/85
Figure 34.
SDRAM/SGRAM random read accesses within a page, read latency of two
1
NOTE
1
Covers either successive reads to the active row in a given bank, or to the active rows in different banks. DQMs are all
active (LOW).
Figure 35.
SDRAM/SGRAM random read accesses within a page, read latency of three
1
NOTE
1
Covers either successive reads to the active row in a given bank, or to the active rows in different banks.
FBDQM
is all
active (LOW).
Figure 36.
SDRAM/SGRAM read to write, read latency of three
t
DH
t
OH
t
AC
t
LZ
Write data hold time
1
1
-
ns
Read data hold time
3
3
-
ns
Read data access time
9
9
-
ns
Data out low impedance time
0
0
-
ns
Symbol
Parameter
Min.
Max.
Unit
Notes
-10
-12
-10
-12
read
read
read
data n
data a
read
nop
nop
bank, col n bank, col a bank, col x bank, col m
data x
data m
FBCLKx
Command
FBA[10:0]
FBD[63:0]
read
read
read
data n
read
nop
nop
bank, col n bank, col a bank, col x bank, col m
data a
data x
data m
nop
FBCLKx
Command
FBA[10:0]
FBD[63:0]
t
HZ
t
DS
read
nop
nop
read data n
nop
write
bank, col n
write data b
bank, col b
FBCLKx
TDDQM
Command
FBA[10:0]
FBD[63:0]
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RIVA128 RIVA 128⑩ 128-BIT 3D MULTIMEDIA ACCELERATOR
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