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參數(shù)資料
| 型號： | SAA4979H |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | Sample rate converter with embedded high quality dynamic noise reduction and expansion port |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP128 |
| 封裝： | 28 X 28 X 3.40 MM, PLASTIC, QFP-128 |
| 文件頁數(shù)： | 19/52頁 |
| 文件大小： | 224K |
| 代理商： | SAA4979H |
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2002 May 28
19
Philips Semiconductors
Product specification
Sample rate converter with embedded high quality
dynamic noise reduction and expansion port
SAA4979H
handbook, full pagewidth
MHC192
(0) 0
(44) 176
(212) 848
(128) 512
(0) 0
(44) 176
(255) 1023
(212) 848
(128) 512
1.33 V (p-p)
1.05 V (p-p)
VOU
+
1.012 V
VOU
1.012 V
VOU
+
0.665 V
VOU
0.665 V
VOU
VOV
+
0.8 V
VOV
0.8 V
VOV
+
0.575 V
VOV
0.575 V
VOV
blue 75%
yellow 75%
colourless
red 75%
cyan 75%
colourless
Fig.7 Chrominance output levels.
a. U output level.
b. V output level.
7.5
Microcontroller
The SAA4979H contains an embedded 80C51
microcontrollercoreincluding512-byteRAMand32-Kbyte
ROM. The microcontroller runs on a 16 MHz clock,
generated by dividing the 32 MHz display clock by a factor
of 2.
7.5.1
H
OST INTERFACE
For controlling internal registers a host interface,
consisting of a parallel address and data bus, is built-in.
The interface can be addressed as internal AUXRAM via a
MOVX type of instruction. The complete range of internal
control registers and the corresponding host addresses
are described in Section 8.1. User access to these control
registers via the I
2
C-bus can be implemented in the
embedded software.
7.5.2
I
2
C-
BUS INTERFACE
The I
2
C-bus interface in the SAA4979H is used in a slave
receive and transmit mode for communication with a
central system microcontroller. The standardized bus
frequencies of both 100 kHz and 400 kHz can be
accommodated.
The I
2
C-bus slave address of the SAA4979H is
0110100 R/W. During slave transmit mode the SCL LOW
period may be extended by pulling SCL to LOW (in
accordance with the I
2
C-bus specification).
Detailed information about the software dependent
I
2
C-bus subaddresses of the control registers and a
detailed description of the transmission protocol can be
found in Application Note “I
2
C-bus register specification of
the SAA4979H”
7.5.3
SNERT-
BUS INTERFACE
A SNERT interface is built-in, which operates in a master
receive and transmit mode for communication with
peripheral circuits such as SAA4991WP or SAA4992H.
The SNERT interface replaces the standard UART
interface. Contrary to the 80C51 UART interface there are
additional special function registers (see Table 10) and
there is no byte separation time between address and
data.
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