2002 May 28
28
Philips Semiconductors
Product specification
Sample rate converter with embedded high quality
dynamic noise reduction and expansion port
SAA4979H
Host address 02B0H to 02BBH and 02AAH (post processing)
02B0
0 to 3
4 to 7
0 to 7
0 to 7
0 to 7
0 to 3
sidepanel_u
sidepanel_v
sidepanel_y
sidepanel_hstart
sidepanel_hstop
y_delay
side panel colour U value (4 MSB)
side panel colour V value (4 MSB)
side panel luminance value (8 MSB)
side panel start position (higher 8 of 10 bits)
side panel stop position (higher 8 of 10 bits)
Y delay relative to UV channel, in clock cycles:
8,
7,
6,
5,
4,
3,
2,
1, 0, 1, 2, 3, 4, 5, 6, and 7
inverts UV output signals: 0 = no inversion, 1 = inversion
gain Y digital-to-analog converter: 0 = 2
μ
A/bit (range 1),
1 = 4
μ
A/bit (range 0); see Fig.6
reserved
blanking window horizontal start position (lower 8 of 10 bits)
blanking window horizontal stop position (lower 8 of 10 bits)
blanking window vertical start position (lower 8 of 10 bits)
blanking window vertical stop position (lower 8 of 10 bits)
blanking window horizontal start position (higher 2 of 10 bits)
blanking window horizontal stop position (higher 2 of 10 bits)
blanking window vertical start position (higher 2 of 10 bits)
blanking window vertical stop position (higher 2 of 10 bits)
non-linear phase filter settings
μ
: (0,
1
4
,
1
2
,
1
2
)
non-linear phase filter settings
λ
: (0,
1
8
,
2
8
,
3
8
)
side panel start position (lower 2 of 10 bits)
side panel stop position (lower 2 of 10 bits)
PIP frame: horizontal start position (lower 8 of 10 bits)
PIP frame: horizontal stop position (lower 8 of 10 bits)
PIP frame: vertical start position (lower 8 of 10 bits)
PIP frame: vertical stop position (lower 8 of 10 bits)
PIP frame: vertical start position (higher 2 of 10 bits)
PIP frame: vertical stop position (higher 2 of 10 bits)
PIP frame: horizontal start position (higher 2 of 10 bits)
PIP frame: horizontal stop position (higher 2 of 10 bits)
PIP horizontal frame width (0 to 15 pixel)
PIP_frame_height (MSBs) PIP vertical frame width (0 to 15 pixel)
02B1
02B2
02B3
02B4
4
5
uv_inv_out
y_dac_current
6 to 7
0 to 7
0 to 7
0 to 7
0 to 7
0 to 1
2 to 3
4 to 5
6 to 7
0 to 1
2 to 3
4 to 5
6 to 7
0 to 7
0 to 7
0 to 7
0 to 7
0 to 1
2 to 3
4 to 5
6 to 7
0 to 3
4 to 7
bln_hstart
bln_hstop
bln_vstart
bln_vstop
bln_hstart (MSBs)
bln_hstop (MSBs)
bln_vstart (MSBs)
bln_vstop (MSBs)
nlp_u
nlp_l
sidepanel_hstart (LSBs)
sidepanel_hstop (LSBs)
PIP_frame_hstart
PIP_frame_hstop
PIP_frame_vstart
PIP_frame_vstop
PIP_frame_vstart (MSBs)
PIP_frame_vstop (MSBs)
PIP_frame_hstart (MSBs)
PIP_frame_hstop (MSBs)
PIP_frame_width (MSBs)
02B5
02B6
02B7
02B8
02B9
02BA
02BB
02BC
02BD
02BE
02BF
02AA
HOST
ADDRESS
(HEX)
BIT
NAME
DESCRIPTION