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參數(shù)資料
| 型號： | SAA4979H |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | Sample rate converter with embedded high quality dynamic noise reduction and expansion port |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP128 |
| 封裝： | 28 X 28 X 3.40 MM, PLASTIC, QFP-128 |
| 文件頁數(shù)： | 35/52頁 |
| 文件大小： | 224K |
| 代理商： | SAA4979H |
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2002 May 28
35
Philips Semiconductors
Product specification
Sample rate converter with embedded high quality
dynamic noise reduction and expansion port
SAA4979H
Notes
1.
The AC characteristics are in accordance with the I
2
C-bus specification for fast mode (clock frequency maximum
400 kHz). Information about the I
2
C-bus can be found in the brochure “I
2
C-bus and how to use it”(order number
9398 393 40011).
More information about the SNERT-bus protocol can be found in Application Note “The SNERT-bus specification”
(AN95127).
2.
t
HD;STA
t
HD;DAT
t
LOW
t
HIGH
t
SU;DAT
t
SU;STA
t
SU;STO
t
BUF
hold time START condition
data hold time
SCL LOW time
SCL HIGH time
data set-up time
set-up time repeated START
set-up time STOP condition
bus free time between a STOP
and START condition
0.6
0
1.3
0.6
100
0.6
0.6
1.3
0.9
μ
s
μ
s
μ
s
μ
s
ns
μ
s
μ
s
μ
s
SNERT-bus timing (valid for both 1 and 2 Mbaud): pins SNDA and SNCL;
note 2
t
su(i)
t
h(i)
t
h(o)
t
su(o)
t
cy(SNCL)
t
SNRSTH
t
d(SNRST-DAT)
delay SNRST pulse to data
input set-up time
input hold time
output hold time
output set-up time
SNCL cycle time
SNRST pulse HIGH time
80
0
50
260
500
500
200
1000
ns
ns
ns
ns
ns
ns
ns
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
handbook, full pagewidth
MHC203
CLOCK
2.4 V
1.5 V
0.6 V
2.0 V
0.8 V
2.4 V
0.4 V
INPUT
DATA
OUTPUT
DATA
th(o)
td(o)
tr
tf
tsu(i)
th(i)
Fig.8 Timing diagram.
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