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參數(shù)資料
| 型號(hào)： | SD1210 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Dual-Interface SXGA TFT LCD Display Controller |
| 中文描述： | 雙接口SXGA TFT液晶顯示控制器 |
| 文件頁數(shù)： | 15/46頁 |
| 文件大?。?/td> | 322K |
| 代理商： | SD1210 |
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SmartASI C, I nc.
SD1210
in Section 3.5.2.
November, 1999
Revision B
SmartASIC Confidential
15
3.1.2.
Input mode detection and frequency detection
The SD1210 can automatically detect the mode of the input signal without any user
adjustment or driver running on the PC host or external CPU. This block
automatically detects polarity of input synchronization and the sizes of back porch,
valid data window and the synchronization pulse width in both vertical and horizontal
directions. The size information is then used not only to decide the input resolution, to
generate the frequency divider for the input PLL, to lock the PLL output clock with
HSYNC, but also to automatically scale the image to full screen and to synchronize
the output signal with the input signal.
The detection logic is always active to automatically detect any changes to the input
mode. Users can manually change the input mode information at run time through the
CPU interface. Detailed operation of the CPU interface is described in Section 3.6.
“CPU Interface”.
Mode detection and frequency detection can be independently turned ON or OFF by
the external CPU. This feature allows system customers to have better control of the
mode-detection and frequency detection process. When the detection is turned OFF,
the external CPU can change the input mode and frequency definitions.
3.1.3.
Phase calibration
The SD1210 can automatically calibrate the phase of the sample clock in order to
preserve the bandwidth of the input signal and to get the best quality. The SD1210
implements a proprietary image quality function. During the auto-calibration process,
the SD1210 continues to search for the best phase to optimize the image quality.
The output image may display some jitter and blurring during the auto-calibration
process, and the image will become crisp and sharp once the optimum phase is found.
User can change the sampling clock phase value through the external CPU. Detailed
operation of the CPU interface is described in Section 3.6. “CPU Interface”.
The phase calibration process can be delayed and even disabled by the external CPU
if the system designer wants to have his/her own implementation. The phase
calibration can be independently turned ON or OFF by the external CPU. When the
calibration is turned OFF, the external CPU can change the input mode and frequency
definitions.
3.1.4.
PWM operation
The SD1210 implements a unique algorithm to adjust the phase of the A/D
converter’s sampling clock. An external delay circuit is required to compliment the
SD1210 for the phase-calibration process. The SD1210 generates a Pulse-Width
Modulated (PWM) signal to the external delay circuit. The delay circuit should insert
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| SD-1210 | 功能描述:SWITCH ROTARY HEX 16-POS TOP RoHS:是 類別:開關(guān) >> DIP 系列:SD-1000 特色產(chǎn)品:RDM Series Rotary DIP Switch 標(biāo)準(zhǔn)包裝:70 系列:RDM 電路:十六進(jìn)制 位置數(shù):16 觸點(diǎn)額定電壓:0.1A @ 42VDC 觸動(dòng)器類型:用于工具旋轉(zhuǎn) 觸動(dòng)器電平:凹槽式 安裝類型:通孔 方向:頂部觸動(dòng) 可清洗:是 其它名稱:EG4977-5RDMAR16PIT |
| SD12-100 | 制造商:COOPER BUSSMANN 功能描述:Ind Power Shielded Wirewound 10uH 20% 100KHz Ferrite 938mA 2020 T/R |
| SD12-100-R | 功能描述:固定電感器 10uH 0.818A 0.2844ohms RoHS:否 制造商:AVX 電感:10 uH 容差:20 % 最大直流電流:1 A 最大直流電阻:0.075 Ohms 工作溫度范圍:- 40 C to + 85 C 自諧振頻率:38 MHz Q 最小值:40 尺寸:4.45 mm W x 6.6 mm L x 2.92 mm H 屏蔽:Shielded 端接類型:SMD/SMT 封裝 / 箱體:6.6 mm x 4.45 mm |
| SD12-101 | 制造商:COOPER BUSSMANN 功能描述:Ind Power Shielded Wirewound 100uH 20% 100KHz Ferrite 308mA 2020 T/R |
| SD12-101-R | 功能描述:固定電感器 100uH 0.273A 2.64ohms RoHS:否 制造商:AVX 電感:10 uH 容差:20 % 最大直流電流:1 A 最大直流電阻:0.075 Ohms 工作溫度范圍:- 40 C to + 85 C 自諧振頻率:38 MHz Q 最小值:40 尺寸:4.45 mm W x 6.6 mm L x 2.92 mm H 屏蔽:Shielded 端接類型:SMD/SMT 封裝 / 箱體:6.6 mm x 4.45 mm |
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