參數(shù)資料
型號: SD1210
廠商: Electronic Theatre Controls, Inc.
英文描述: Dual-Interface SXGA TFT LCD Display Controller
中文描述: 雙接口SXGA TFT液晶顯示控制器
文件頁數(shù): 19/46頁
文件大?。?/td> 322K
代理商: SD1210
SmartASI C, I nc.
SD1210
When the weight is 255, the OSD output will overlay on top of the normal output.
When the weight is 0, the OSD output is disabled.
November, 1999
Revision B
SmartASIC Confidential
19
3.4.2.
LCD interface
The SD1210 support both 24- and 48-bit RGB interfaces with SXGA LCD panels
from various panel manufacturers. The LCD panel resolution and timing information
is stored in the external EEPROM. The information in the EEPROM includes timing
related to the output back porch, synchronization pulse width and valid data window.
The timing information is used to generate the frequency divider for the output PLL,
to lock the PLL output clock with HSYNC for the LCD data clock, and to
synchronize the output VSYNC and input VSYNC.
3.5.
EEPROM interface
As mentioned in previous sections, the external EEPROM stores crucial information
for the SD1210 internal operations. The SD1210 interfaces with the EEPROM
through a 2-wire serial interface. The suggested EEPROM device is an industry
standard serial-interface EEPROM (24x08). The 2-wire serial interface scheme is
briefly described here and a detailed description can be found in public literature.
3.5.1.
2-wire serial interface
The 2-wire serial interface uses 2 wires, SCL and SDA. The SCL is driven by the
SD1210 and used mainly as the sampling clock. The SDA is a bi-directional signal
and used mainly as a data signal. Figure 4 shows the basic bit definitions of the 2-wire
serial interface.
The 2-wire serial interface supports random and sequential read operations. Figures 5
and 6 show the data sequences for random read and sequential read operations.
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