參數(shù)資料
型號(hào)： SD1210
廠商： Electronic Theatre Controls, Inc.
英文描述： Dual-Interface SXGA TFT LCD Display Controller
中文描述： 雙接口SXGA TFT液晶顯示控制器
文件頁(yè)數(shù)： 35/46頁(yè)
文件大?。?/td> 322K
代理商： SD1210
SmartASI C, I nc.
SD1210
November, 1999
Revision B
SmartASIC Confidential
35
Enable
1: enable horizontal rounding
0: disable horizontal rounding
Enable vertical rounding (default 0):
1: enable vertical rounding
0: disable vertical rounding
Enable horizontal Table Lookup (default 0):
1: enable horizontal Table Lookup
0: disable horizontal Table Lookup
Enable vertical Table Lookup (default 0):
1: enable vertical Table Lookup
0: disable vertical Table Lookup
Enable detection of short lines (IBM panel only,
default 0):
1: Enable such detection
0: disable such detection
OSD intensity selection:
0: half intensity
1: full intensity
Should be kept low most of the time. A high pulse will
force SD1210 to reload all EEPROM entries
Should be kept low most of the time. A high pulse will
force SD1210 to reload mode dependent EEPROM
entries
External CPU control enable:
0: disable external CPU control. SD1210 can write
control registers, but CPU only read control registers.
1: enable external CPU control. CPU can read/write
control registers. SD1210 cannot write control
registers
Read only internal status registers:
1: indicate error status
0: indicate normal status
Bit 0: EEPROM vertical lookup table loading
Bit 1: EERPOM horizontal lookup table loading
Bit 2: EEPROM mode dependent entries loading
Bit 3: EEPROM calibration entries loading
Bit 4: input has too few lines
Bit 5: no input video
Bit 6: input data clock is too fast
Bit 7: refresh rate exceed LCD panel specification
2BH[3:0] Internal auto calibration state
0: Idle State
1-4: Loading EEPROM data
5-9: Frequency Calibration State (Auto Frequency
Calibration will be done after state 9)
10: Phase Calibration State (Auto Phase Calibration
will
be
done
11: Adjust Horizontal Back Porch state
12: Phase Tracking state
2CH[7:0] Control Register A:
0 – disable
1 – enable
default is 00H
Vertical Rounding
Enable
1
RW
28H[2]
Horizontal Table
Lookup Enable
1
RW
28H[1]
Vertical Table
Lookup Enable
1
RW
28H[0]
HSYNC Threshold
Enable
1
RW
29H[4]
OSD Intensity
1
RW
29H[3]
Load ALL EEPROM
1
RW
29H[2]
Load Mode
Dependent EEPROM
1
RW
29H[1]
CPU control enable
1
RW
29H[0]
Status 0
8
R
2AH
Status 1
4
R
after
state
10)
Control_A
8
RW
Bit 0: Horizontal Interpolation Offset Enable
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