參數(shù)資料
型號: SDA9255
廠商: SIEMENS AG
英文描述: SRC-Scan Rate Converter SDA9255
中文描述: 鋼骨混凝土掃描頻率轉(zhuǎn)換器SDA9255
文件頁數(shù): 14/45頁
文件大小: 225K
代理商: SDA9255
SDA 9255
Semiconductor Group
12
1998-02-01
edge of the previous HS_int, compare
chapter 1
). Thus the sampling points of the field
identify circuit (marked in the diagram with a“ and b“) have uniform distances to the
falling edge of the VS_int.
The falling edge of the VIN signal of field B is at 3
μ
s and the falling edge of the VS_int
signal is at 48
μ
s (related to the falling edge of the previous HIN). Here the sampling
points have also uniform distances to the falling edge of the VS_int signal. The user
should adjust this value carefully. Dependent on the input mode of the frontend circuit
the integration time of the V-Sync can change. For non-standard signals, for instance, a
shorter integration time may be chosen. The internal V-Sync (VS_int) must have the
falling edge at line 2 for field A. All the other settings (NALIP ...) are dependent on this
internal V-Sync. The default setting of the VSDLY is 3A
H
. This corresponds to a delay of
about 69
μ
s (58 (= 3A
H
)
*
32
*
37 ns), which suits for the clock sync generator
SDA 9257 and SDA 9206.
2.3.2
The subaddress 0A
H
(AL,
see description of
I
2
C Bus
) is used to adjust the number of
active lines per input and output field. It is independent of the MODE10050 in
subaddress 00
H
. The register value AL has to be chosen in the following way:
Number of Active Lines of an Input Field
2.3.3
Due to the fact that the SDA 9255 stores only the active field in the field memory, it
requires the information of the start of the active field and the active line. A not-active-
line counter (NALIP, subaddress 0B
H
,
see description of
I
2
C Bus
) starts counting the
incoming H-Syncs when it detects a falling edge of the VS_int signal. If VS_int is adjusted
as recommended in the explanation of subaddress 09
H
then the calculation of the NALIP
value can be done in the following way:
Number of Not Active Lines of an Input Field
NALIP = first active line of field A – 5 (e.g. 23 – 5 = 18)
In figure 10 (
see chapter 5.4, Example for Not Active Input Register
) an example for
NALIP = 18 is shown. As you can see for field A 21 H-Syncs are counted and for field B
22 H-Syncs are counted. If NALIP is set to '0' line 5 is the first active line of field A and
line 318 the first active line of field B (318 – 5 = 313). The difference between first active
line of field B and field A should be:
δ
= (No.lines per frame DIV 2) + 1; e.g.
δ
= 625 DIV 2 + 1 = 313
AL
Number of lines per field
2
2
2
2
------------------
143
=
;
=
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