參數(shù)資料
型號: SDA9255
廠商: SIEMENS AG
英文描述: SRC-Scan Rate Converter SDA9255
中文描述: 鋼骨混凝土掃描頻率轉(zhuǎn)換器SDA9255
文件頁數(shù): 17/45頁
文件大?。?/td> 225K
代理商: SDA9255
SDA 9255
Semiconductor Group
15
1998-02-01
VOUT, HREF) signals are high active. In the example the register value is 10 and the
mode is '0' (100/120 Hz/interlaced).
FAOPL = NALOP
*
2 + 3 = 10
*
2 + 3 = 23
So line 23 is the first active output line.
For proper operation the number of not active lines at output side plus the number of
active lines have to be smaller than the total number of lines. The following formula
should be true.
NALOP
*
2 + AL
*
2 + 3
(No. of lines per frame) DIV 2 (e.g. 312)
where
AL:
NALOP:
Register value
Register value
2.4.2
To change the horizontal position of the picture on the screen the NAPOP register value
can be utilized. The not active pixels for output register ( NAPOP ) is used to adjust the
number of not active output pixels of a line. The register value is multiplied by '4' and
has an initial value of 9 ... 12 (HSODLY = 0), depending on the MCNAPIP setting
(subaddress 0B
H
and 0C
H
,
see description of
I
2
C Bus
).
FAOPP = NAPOP
*
4 + 9 ... 12 – HSODLY = 0
FAOPP = NAPOP
*
4 + (- 163) ... (- 160) ; HSODLY = 1
is equal to : FAOPP = NAPOP
*
4 + 9 ... 12 – 172
*
HSODLY
where
FAOPP:
The first active output pixel after rising edge of HOUT
NAPOP:
Register value
HSODLY:
Register value
The time from the rising edge of the HOUT signal to the first active output pixel can be
calculated in the following way:
t
NAPOP
= ( NAPOP
*
4 + 9 ... 12 )
*
t
LL2CLK
; HSODLY = 0
t
NAPOP
= (NAPOP
*
4 + (- 163) ... (-160))
*
t
LL2CLK
; HSODLY = 1
where
t
NAPOP
: Time from rising edge of HOUT to first active output pixel
t
LL2CLK
: System clock period (e.g. 1/27 MHz)
figure 12 (
see chapter 5.6, Example for Not Active Output Pixels
) shows the effect of
the register NAPOP.
Number of Not Active Pixels of Output Field
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