
SiS5595 PCI System I/O Chipset
Preliminary V2.0 Nov. 2, 1998
Silicon Integrated Systems Corporation
i
Contents
1
FEATURES....................................................................................................... 1
1.1
1.2
SiS5595 PCI SYSTEM I/O.................................................................... 1
FUNCTIONAL BLOCK DIAGRAM ........................................................ 4
2 PIN ASSIGNMENT (TOP VIEW)....................................................................... 6
2.1
2.2
SiS5595 PIN ASSIGNMENT (TOP VIEW)............................................ 6
SiS5595 CHIP ALPHABETICAL PIN LIST............................................ 7
3
FUNCTIONAL DESCRIPTION .......................................................................... 9
3.1
PCI BUS INTERFACE.......................................................................... 9
PCI TO ISA BUS BRIDGE ............................................................ 9
DISTRIBUTED DMA (DDMA)...................................................... 11
PC/PCI DMA............................................................................... 12
SERIAL IRQ (SIRQ).................................................................... 12
ACPI /LEGACY PMU.......................................................................... 15
ADVANCED CONFIGURATION AND POWER INTERFACE
(ACPI) …………………………………………………………………..15
3.2.2
POWER MANAGEMENT UNIT................................................... 33
3.3
SMBUS FUNCTIONAL DESCRIPTIONS............................................ 36
3.3.1
SMBUS HOST MASTER INTERFACE........................................ 36
3.3.2
SMBUS HOST SLAVE INTERFACE........................................... 36
3.4
USB INTERFACE............................................................................... 37
3.5
DATA ACQUISITION MODULE (DAM)............................................... 38
3.5.1
GENERAL DESCRIPTION.......................................................... 38
3.5.2
POWER SUPPLY VOLTAGE MONITORING.............................. 39
3.5.3
FAN SPEED MONITORING........................................................ 39
3.5.4
THE ROUND-ROBIN SAMPLING CYCLE.................................. 40
3.5.5
INTERFACE REGISTER BLOCK................................................ 41
3.5.6
INTERNAL REGISTERS............................................................. 41
3.6
INTEGRATED REAL TIME CLOCK (RTC)......................................... 41
3.6.1
REAL TIME CLOCK MODULE.................................................... 41
3.7
AUTOMATIC POWER CONTROL MODULE...................................... 44
3.7.1
APC REGISTERS....................................................................... 45
3.7.2
APC FUNCTIONS....................................................................... 45
3.7.3
S3 (STR) FUNCTION RELATED SIGNALS................................ 50
3.8
INTEGRATED KEYBOARD CONTROLLER....................................... 52
3.8.1
STATUS REGISTER................................................................... 52
3.8.2
INPUT/OUTPUT BUFFER .......................................................... 53
3.8.3
INTERNAL OUTPUT PORT DEFINITIONS................................. 53
3.8.4
KEYBOARD INTERNAL BIOS COMMANDS ( I/O PORT 64H ).. 54
3.8.5
PASSWORD SECURITY AND KEYBOARD POWER UP
3.1.1
3.1.2
3.1.3
3.1.4
3.2
3.2.1