
SiS5595 PCI System I/O Chipset
Preliminary V2.0 Nov. 2, 1998
Silicon Integrated Systems Corporation
ii
FUNCTIONS............................................................................... 56
3.8.6
RELATED PCI TO ISA BRIDGE CONFIGURATION REGISTERS
………………………………………………………………………… 58
3.9
ISA BUS INTERFACE ........................................................................ 59
3.9.1
ISA BUS CONTROLLER ............................................................ 59
3.9.2
DMA CONTROLLER................................................................... 59
3.9.3
INTERRUPT CONTROLLER...................................................... 59
3.9.4
INTERRUPT STEERING ............................................................ 60
3.9.5
TIMER/COUNTER...................................................................... 61
3.10
SYSTEM RESET................................................................................ 61
4
PIN DESCRIPTIONS....................................................................................... 63
4.1
4.2
4.3
4.4
4.5
4.6
4.7
PCI/ISA BUS INTERFACE ................................................................. 63
PCI BUS + CPU INTERFACE............................................................. 65
KBC + MISC....................................................................................... 67
USB CONTROLLER........................................................................... 72
RTC.................................................................................................... 73
DATA ACQUISITION INTERFACE..................................................... 75
POWER PINS..................................................................................... 76
5
HARDWARE TRAP......................................................................................... 77
6
REGISTER SUMMARY................................................................................... 79
6.1
6.2
PCI TO ISA BRIDGE CONFIGURATION REGISTERS ...................... 79
LEGACY ISA REGISTERS................................................................. 80
DMA REGISTERS ...................................................................... 80
INTERRUPT CONTROLLER REGISTERS................................. 82
TIMER REGISTERS................................................................... 82
OTHER REGISTERS.................................................................. 82
PMU CONFIGURATION REGISTERS ............................................... 83
ACPI CONFIGURATION REGISTERS............................................... 84
SMBUS IO REGISTERS..................................................................... 85
USB OPENHCI HOST CONTROLLER CONFIGURATION SPACE.... 85
USB CONFIGURATION SPACE (FUNCTION 2) ........................ 85
HOST CONTROLLER OPERATIONAL REGISTERS................. 86
AUTOMATIC POWER CONTROL (APC) REGISTERS...................... 87
RTC REGISTERS....................................................................... 87
DATA ACQUISITION MODULE (DAM) INTERNAL REGISTERS....... 88
6.2.1
6.2.2
6.2.3
6.2.4
6.3
6.4
6.5
6.6
6.6.1
6.6.2
6.7
6.7.1
6.8
7
REGISTER DESCRIPTION............................................................................. 89
7.1
7.2
7.3
7.4
7.5
PCI TO ISA BRIDGE CONFIGURATION REGISTERS ...................... 89
PMU CONFIGURATION REGISTERS ............................................. 111
ACPI CONFIGURATION REGISTERS............................................. 134
SMBUS IO REGISTERS................................................................... 153
THE DATA ACQUISITION MODULE INTERNAL REGISTERS........ 160