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參數資料
| 型號： | TLV320AIC3120IRHBT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 音頻／視頻放大 |
| 英文描述： | AUDIO AMPLIFIER, PQCC32 |
| 封裝： | 5 X 5 MM, GREEN, PLASTIC, QFN-32 |
| 文件頁數： | 109/150頁 |
| 文件大?。?/td> | 1507K |
| 代理商： | TLV320AIC3120IRHBT |
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SLAS653 – FEBRUARY 2010
If shutdown occurs due to an overcurrent condition, then the device requires a reset to re-enable the
output stage. Resetting can be done in two ways. First, the device master reset can be used, which
requires either toggling the RESET pin or using the software reset. If master reset is used, it resets all of
the registers. Second, a dedicated speaker power-stage reset can be used that keeps all of the other
device settings. The speaker power-stage reset is done by setting page 1 / register 32, bit D7 for SPKP
and SPKM. If the fault condition has been removed, then the device returns to normal operation. If the
fault is still present, then another shutdown occurs. Repeated resetting (more than three times) is not
recommended, as this could lead to overheating.
To minimize battery current leakage, the SPKVDD voltage level should not be less than the AVDD
voltage level.
The TLV320AIC3120 has a thermal protection (OTP) feature for the speaker drivers which is always
enabled to provide protection. If the device is overheated, then the output stops switching. When the
device cools down, the device resumes switching. An overtemperature status flag is provided as a
read-only bit on page 0 / register 3, bit D1. The OTP feature is for self-protection of the device. If die
temperature can be controlled at the system/board level, then overtemperature does not occur.
5.6.10 Audio Output-Stage Power Configurations
After the device has been configured (following a RESET) and the circuitry has been powered up, the
audio output stage can be powered up and powered down by register control.
These functions soft-start automatically. The two power stages can be powered up or powered down
independently.
See Table 5-32 for register control of audio output stage power configurations.
Table 5-32. Audio Output-Stage Power Configurations
Audio Output Pins
Desired Function
Page 1 / Register, Bit Value
HPOUT
Power down HPOUT driver
Page 1 / register 31, bit D7 = 0
HPOUT
Power up HPOUT driver
Page 1 / register 31, bit D7 = 1
SPKP / SPKM
Power down class-D driver
Page 1 / register 32, bit D7 = 0
SPKP / SPKM
Power up class-D driver
Page 1 / register 32, bit D7 = 1
5.6.11 DAC Setup
The following paragraphs are intended to guide a user through the steps necessary to configure the
TLV320AIC3120 DAC.
Step 1
The system clock source (master clock) and the targeted DAC sampling frequency must be identified.
Depending on the targeted performance, the decimation filter type (A, B, or C) and DOSR value can be
determined:
Filter A should be used for 48-kHz high-performance operation; DOSR must be a multiple of 8.
Filter B should be used for up to 96-kHz operations; DOSR must be a multiple of 4.
Filter C should be used for up to 192-kHz operations; DOSR must be a multiple of 2.
In all cases, DOSR is limited in its range by the following condition:
2.8 MHz < DOSR × DAC_fS < 6.2 MHz
Based on the identified filter type and the required signal-processing capabilities, the appropriate
processing block can be determined from the list of available processing blocks (PRB_P4 to PRB_P22).
Copyright 2010, Texas Instruments Incorporated
APPLICATION INFORMATION
61
Product Folder Link(s): TLV320AIC3120
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| TLV320AIC31IRHBRG4 | 功能描述:接口—CODEC Lo-Pwr Ster Codec for Port Aud/Teleph RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
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