參數資料
型號： TLV320AIC3120IRHBT
廠商： TEXAS INSTRUMENTS INC
元件分類： 音頻／視頻放大
英文描述： AUDIO AMPLIFIER, PQCC32
封裝： 5 X 5 MM, GREEN, PLASTIC, QFN-32
文件頁數： 132/150頁
文件大?。?/td> 1507K
代理商： TLV320AIC3120IRHBT
SLAS653 – FEBRUARY 2010
www.ti.com
Table 6-2. Page 0 / Register 7 (0x07): PLL D-VAL MSB(1)
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D6
R/W
00
Reserved. Write only zeros to these bits.
D5–D0
R/W
00 0000
PLL fractional multiplier D-Val MSB bits D[13:8]
(1)
Note that this register will be updated only when page 0 / register 8 is written immediately after page 0 / Register 7.
Page 0 / Register 8 (0x08): PLL D-VAL LSB(1)
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D0
R/W
0000 0000
PLL fractional multiplier D-Val LSB bits D[7:0]
(1)
Note that page 0 / register 8 must be written immediately after page 0 / Register 7.
Page 0 / Register 9 (0x09) and Page 0 / Register 10 (0x0A): Reserved
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D0
R/W
XXXX XXXX
Reserved. Write only zeros to these bits.
Page 0 / Register 11 (0x0B): DAC NDAC_VAL
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7
R/W
0
0: DAC NDAC divider is powered down.
1: DAC NDAC divider is powered up.
D6–D0
R/W
000 0001
000 0000: DAC NDAC divider = 128
000 0001: DAC NDAC divider = 1
000 0010: DAC NDAC divider = 2
...
111 1110: DAC NDAC divider = 126
111 1111: DAC NDAC divider = 127
Page 0 / Register 12 (0x0C): DAC MDAC_VAL
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7
R/W
0
0: DAC MDAC divider is powered down.
1: DAC MDAC divider is powered up.
D6–D0
R/W
000 0001
000 0000: DAC MDAC divider = 128
000 0001: DAC MDAC divider = 1
000 0010: DAC MDAC divider = 2
...
111 1110: DAC MDAC divider = 126
111 1111: DAC MDAC divider = 127
Page 0 / Register 13 (0x0D): DAC DOSR_VAL MSB
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D2
R/W
0000 00
Reserved
D1–D0
R/W
00
DAC OSR value DOSR(9:8)
Page 0 / Register 14 (0x0E): DAC DOSR_VAL LSB(1) (2)
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D0
R/W
1000 0000
DAC OSR Value DOSR(7:0)
0000 0000: DAC OSR(7:0) = 1024 (MSB page 0 / register 13, bits D1–D0 = 00)
0000 0001: DAC OSR(7:0) = 1(MSB page 0 / register 13, bits D1–D0 = 00)
0000 0010: DAC OSR(7:0) = 2 (MSB page 0 / register 13, bits D1–D0 = 00)
...
1111 1110: DAC OSR(7:0) = 1022 (MSB page 0 / register 13, bits D1–D0 = 11)
1111 1111: DAC OSR(7:0) = 1023 (MSB page 0 / register 13, bits D1–D0 = 11)
(1)
DAC OSR should be an integral multiple of the interpolation in the DAC miniDSP engine (specified in register 16).
(2)
Note that page 0 / register 14 must be written to immediately after writing to page 0 / register 13.
82
REGISTER MAP
Copyright 2010, Texas Instruments Incorporated
Product Folder Link(s): TLV320AIC3120
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