參數(shù)資料
型號： TMS320C2812ZHHS
廠商： TEXAS INSTRUMENTS INC
元件分類： 數(shù)字信號處理
英文描述： 16-BIT, 150 MHz, OTHER DSP, PBGA179
封裝： LEAD FREE, BGA-179
文件頁數(shù)： 28/156頁
文件大?。?/td> 1826K
代理商： TMS320C2812ZHHS
Electrical Specifications
123
April 2001 Revised October 2005
SPRS174M
6.22
External Interface (XINTF) Timing
Each XINTF access consists of three parts: Lead, Active, and Trail. The user configures the Lead/Active/Trail
wait states in the XTIMING registers. There is one XTIMING register for each XINTF zone. Table 628 shows
the relationship between the parameters configured in the XTIMING register and the duration of the pulse in
terms of XTIMCLK cycles.
Table 628. Relationship Between Parameters Configured in XTIMING and Duration of Pulse
DESCRIPTION
DURATION (ns)
DESCRIPTION
X2TIMING = 0
X2TIMING = 1
LR
Lead period, read access
XRDLEAD
× tc(XTIM)
(XRDLEAD
× 2) × tc(XTIM)
AR
Active period, read access
(XRDACTIVE + WS + 1)
× tc(XTIM)
(XRDACTIVE
× 2 + WS + 1) × tc(XTIM)
TR
Trail period, read access
XRDTRAIL
× tc(XTIM)
(XRDTRAIL
× 2) × tc(XTIM)
LW
Lead period, write access
XWRLEAD
× tc(XTIM)
(XWRLEAD
× 2) × tc(XTIM)
AW
Active period, write access
(XWRACTIVE + WS + 1)
× tc(XTIM)
(XWRACTIVE
× 2 + WS + 1) × tc(XTIM)
TW
Trail period, write access
XWRTRAIL
× tc(XTIM)
(XWRTRAIL
× 2) × tc(XTIM)
tc(XTIM) Cycle time, XTIMCLK
WS refers to the number of wait states inserted by hardware when using XREADY. If the zone is configured to ignore XREADY (USEREADY = 0),
then WS = 0.
Minimum wait state requirements must be met when configuring each zone’s XTIMING register. These
requirements are in addition to any timing requirements as specified by that device’s data sheet. No internal
device hardware is included to detect illegal settings.
If the XREADY signal is ignored (USEREADY = 0), then:
1.
Lead:
LR
≥ tc(XTIM)
LW
≥ tc(XTIM)
These requirements result in the following XTIMING register configuration restrictions§:
XRDLEAD
XRDACTIVE
XRDTRAIL
XWRLEAD
XWRACTIVE
XWRTRAIL
X2TIMING
≥ 1
≥ 0
≥ 1
≥ 0
0, 1
§ No hardware to detect illegal XTIMING configurations
Examples of valid and invalid timing when not sampling XREADY§:
XRDLEAD
XRDACTIVE
XRDTRAIL
XWRLEAD
XWRACTIVE
XWRTRAIL
X2TIMING
Invalid
0
0, 1
Valid
1
0
1
0
0, 1
§ No hardware to detect illegal XTIMING configurations
相關(guān)PDF資料
PDF描述
TMS320C6747BZKB4 OTHER DSP, PBGA256
TMS320LF2407APGEA 16-BIT, 20 MHz, OTHER DSP, PQFP144
TMS426409AP-60DJ 4M X 4 EDO DRAM, 60 ns, PDSO24
TMS426809AP-70DGC 2M X 8 EDO DRAM, 70 ns, PDSO28
TMS44400DJ-80 1M X 4 FAST PAGE DRAM, 80 ns, PDSO20
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TMS320C28341 制造商:TI 制造商全稱:Texas Instruments 功能描述:Delfino Microcontrollers
TMS320C28341ZEPQ 制造商:Texas Instruments 功能描述:DELFINO MICROCONTROLLER - Trays
TMS320C28341ZFEQ 功能描述:32位微控制器 - MCU Delfino MCU RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:90 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風格:SMD/SMT
TMS320C28341ZFET 功能描述:32位微控制器 - MCU Delfino MCU RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:90 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風格:SMD/SMT
TMS320C28341ZHHT 功能描述:32位微控制器 - MCU Delfino MCU RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:90 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風格:SMD/SMT
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*