參數(shù)資料
型號(hào)： TMS320C2812ZHHS
廠商： TEXAS INSTRUMENTS INC
元件分類： 數(shù)字信號(hào)處理
英文描述： 16-BIT, 150 MHz, OTHER DSP, PBGA179
封裝： LEAD FREE, BGA-179
文件頁(yè)數(shù)： 72/156頁(yè)
文件大小： 1826K
代理商： TMS320C2812ZHHS
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Introduction
22
April 2001 Revised October 2005
SPRS174M
Table 22. Signal Descriptions (Continued)
NAME
DESCRIPTION
PU/PD§
I/O/Z
PIN NO.
NAME
DESCRIPTION
PU/PD§
I/O/Z
128-PIN
PBK
176-PIN
PGF
179-PIN
GHH
JTAG
TRST
B12
135
98
I
PD
JTAG test reset with internal pulldown. TRST, when driven
high, gives the scan system control of the operations of the
device. If this signal is not connected or driven low, the device
operates in its functional mode, and the test reset signals are
ignored.
NOTE: Do not use pullup resistors on TRST; it has an internal
pulldown device. TRST is an active high test pin and must be
maintained low at all times during normal device operation. In
a low-noise environment, TRST may be left floating. In other
instances,
an
external
pulldown
resistor
is
highly
recommended. The value of this resistor should be based on
drive strength of the debugger pods applicable to the design.
A 2.2-k
resistor generally offers adequate protection. Since
this is application-specific, it is recommended that each target
board be validated for proper operation of the debugger and
the application.
TCK
A12
136
99
I
PU
JTAG test clock with internal pullup
TMS
D13
126
92
I
PU
JTAG test-mode select (TMS) with internal pullup. This serial
control input is clocked into the TAP controller on the rising
edge of TCK.
TDI
C13
131
96
I
PU
JTAG test data input (TDI) with internal pullup. TDI is clocked
into the selected register (instruction or data) on a rising edge
of TCK.
TDO
D12
127
93
O/Z
JTAG scan out, test data output (TDO). The contents of the
selected register (instruction or data) is shifted out of TDO on
the falling edge of TCK.
EMU0
D11
137
100
I/O
PU
Emulator pin 0. When TRST is driven high, this pin is used
as an interrupt to or from the emulator system and is
defined as input/output through the JTAG scan.
EMU1
C9
146
105
I/O
PU
Emulator pin 1. When TRST is driven high, this pin is used
as an interrupt to or from the emulator system and is
defined as input/output through the JTAG scan.
ADC ANALOG INPUT SIGNALS
ADCINA7
B5
167
119
I
ADCINA6
D5
168
120
I
ADCINA5
E5
169
121
I
8-Channel analog inputs for Sample-and-Hold A. The ADC
ADCINA4
A4
170
122
I
8-Channel analog inputs for Sample-and-Hold A. The ADC
pins should not be driven before VDDA1, VDDA2, and VDDAIO
ADCINA3
B4
171
123
I
pins should not be driven before VDDA1, VDDA2, and VDDAIO
pins have been fully powered up.
ADCINA2
C4
172
124
I
pins have been fully powered up.
ADCINA1
D4
173
125
I
ADCINA0
A3
174
126
I
Typical drive strength of the output buffer for all pins is 4 mA except for TDO, XCLKOUT, XF, XINTF, EMU0, and EMU1 pins, which are 8 mA.
I = Input, O = Output, Z = High impedance
§ PU = pin has internal pullup; PD = pin has internal pulldown. Pullup/pulldown strength is given in Section 6.3.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TMS320C28341 制造商:TI 制造商全稱:Texas Instruments 功能描述:Delfino Microcontrollers
TMS320C28341ZEPQ 制造商:Texas Instruments 功能描述:DELFINO MICROCONTROLLER - Trays
TMS320C28341ZFEQ 功能描述:32位微控制器 - MCU Delfino MCU RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:90 MHz 程序存儲(chǔ)器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風(fēng)格:SMD/SMT
TMS320C28341ZFET 功能描述:32位微控制器 - MCU Delfino MCU RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:90 MHz 程序存儲(chǔ)器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風(fēng)格:SMD/SMT
TMS320C28341ZHHT 功能描述:32位微控制器 - MCU Delfino MCU RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:90 MHz 程序存儲(chǔ)器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風(fēng)格:SMD/SMT
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