- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄373714 > TS68230CP10 (意法半導(dǎo)體) HMOS PARALLEL INTERFACE/TIMER PDF資料下載
參數(shù)資料
| 型號： | TS68230CP10 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | HMOS PARALLEL INTERFACE/TIMER |
| 中文描述： | HMO的并行接口/定時(shí)器 |
| 文件頁數(shù)： | 4/61頁 |
| 文件大?。?/td> | 2911K |
| 代理商： | TS68230CP10 |
第1頁第2頁第3頁當(dāng)前第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁
Table 1.1 :
Port Mode Control Summary.
Mode 0
(unidirectional 8-bit mode)
Port A
Submode 00 - Pin-definable Double-buffered Input or Single-buffered Output
H1 - Latches Input Data
H2 - Status/interrupt Generating Input, General-purpose Output, or Operation with H1 in the Interlocked or
Pulsed Handshake Protocols
Submode 01 - Pin-definable Double-buffered Output or Non-latched Input
H1 - Indicates Data Received by Peripheral
H2 - Status/interrupt Generating Input, General-purpose Output, or Operation with H1 in the Interlocked or
Pulsed Handshake Protocols
Submode 1X - Pin-definable Single-buffered Output or non-latched Input
H1 - Status/interrupt Generating Input
H2 - Status/interrupt Generating Input or General-purpose Output
Port B
H3 and H4 - Identical to Port A, H1 and H2
Mode 1
(unidirectional 16-bit mode)
Port A - Most-significant Data Byte or non-latched Input or Single-buffered Output
Submode XX - (not used)
H1 - Status/interrupt Generating Input
H2 - Status/interrupt Generating Input or General-purpose Output
Port B - Least-significant Data Byte
Submode X0 - Pin-definable Double-buffered Input or Single-buffered Output
H3 - Latches Input Data
H4 - Status/interrupt Generating Input, General-purpose Output, or Operation with H3 in the Interlocked or
pulsed handshake Protocols
Submode X1 - Pin-definable Double-buffered Output or Non-latched Input
H3 - Indicates Data Received by Peripheral
H4 - Status/interrupt Generating Input, General-purpose Output, or Operation with H3 in the Interlocked or
Pulsed Hanshake Protocols
Mode 2
(bidirectional 8-bit mode)
Port A - Bit I/O
Submode XX - (not used)
Port B - Double-buffered Bidirectional Data
Submode XX - (not used)
H1 - Indicates Output Data Received by the Peripheral and Controls Output Drivers
H2 - Operation with H1 in the Interlocked or Pulsed Output Handshake Protocols
H3 - Latches Input Data
H4 - Operation with H3 in the Interlocked or Pulsed Input Handshake Protocols
Mode 3
(bidirectional 16-bit mode)
Port A - Double-buffered Bidirectional Data (most-signifiant data byte)
Submode XX - (not used)
Port B - Double-buffered Bidirectional Data (least-signifiant data byte)
Submode XX - (not used)
H1 - Indicates Output Data Received by the Peripheral and Controls Output Drivers
H2 - Operation with H1 in the Interlocked or Pulsed Output Handshake Protocols
H3 - Latches Input Data
H4 - Operation with H3 in the Interlocked or Pulsed Input Handshake Protocols
TS68230
4/61
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TS68230CP8 | HMOS PARALLEL INTERFACE/TIMER |
| TS68230P | HMOS PARALLEL INTERFACE/TIMER |
| TS68230CFN8 | HMOS PARALLEL INTERFACE/TIMER |
| TS68302DESC01QYA | Integrated Multiprotocol Processor IMP |
| TS68302VA16 | Integrated Multiprotocol Processor IMP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TS68230CP8 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:HMOS PARALLEL INTERFACE/TIMER |
| TS68230FN | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:HMOS PARALLEL INTERFACE/TIMER |
| TS68230MC1B/C10 | 制造商:e2v technologies 功能描述: |
| TS68230MCB/C8 | 制造商:e2v technologies 功能描述: |
| TS68230P | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:HMOS PARALLEL INTERFACE/TIMER |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。