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參數(shù)資料
| 型號(hào)： | TS8308500VGL |
| 廠商： | E2V TECHNOLOGIES PLC |
| 元件分類： | ADC |
| 英文描述： | 1-CH 8-BIT PROPRIETARY METHOD ADC, SERIAL ACCESS, CBGA68 |
| 封裝： | 11 X 11 MM, 1.27MM PITCH, CERAMIC, BGA-68 |
| 文件頁(yè)數(shù)： | 45/50頁(yè) |
| 文件大?。?/td> | 491K |
| 代理商： | TS8308500VGL |
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5
TS8308500
2193A–BDC–04/03
Clock input power level
–
4
-2
4
10
dBm
Clock input capacitance
C
CLK
4–
3
3.5
pF
Digital Outputs
Single-ended or differential input mode, 50% clock duty cycle (CLK, CLKB), binary output data format,
Tj (typical) = 70
°C. Full temperature range: 0°C < Tc; Tj < +90°C or -40°C < Tc ; Tj < 110°C
(1)(6)
Logic compatibility for digital outputs
(Depending on the value of V
PLUSD)
(14)
––
ECL or LVDS
–
Differential output voltage swings
(assuming V
PLUSD = 0V):
–4
–
75
open transmission lines (ECL levels)
–
1.5
1.620
–
V
75
differentially terminated
–
0.70
0.825
–
V
50
differentially terminated
–
0.54
0.660
–
V
Output levels (assuming V
PLUSD = 0V)
75
open transmission lines:
–4
–
(6)
Logic 0 voltage
V
OL
––
-1.62
-1.54
V
Logic 1 voltage
VOH
–-0.88
-0.8
–
V
Output levels (assuming V
PLUSD = 0V)
75
differentially terminated:
–4
–
(6)
Logic 0 voltage
V
OL
––
-1.41
-1.34
V
Logic 1 voltage
V
OH
–-1.07
-1
–
V
Output levels (assuming VPLUSD = 0V)
50
differentially terminated:
––
–
(6)
Logic 0 voltage
VOL
1, 2
–
-1.40
-1.32
V
Logic 1 voltage
V
OH
1, 2
-1.16
-1.10
–
V
Differential Output Swing
DOS
4
270
300
–
mV
Output level drift with temperature
–
4
–
1.6
mV/
°C
DC Accuracy
Single-ended or differential input mode, 50% clock duty cycle (CLK, CLKB), Binary output data format
Tj (typical) = 70
°C
Differential non linearity
DNL-
1
-0.6
-0.4
–
lsb/V
(2)(3)
Differential non linearity
DNL+
1
–
0.4
0.6
lsb/V
Integral non linearity
INL-
1
-1.2
-0.7
–
lsb/V
(2)(3)
Integral non linearity
INL+
1
–
0.7
1.2
lsb/V
No missing codes
–
Guaranteed over specified temperature range
(3)
Gain
–
1, 2
90
98
110
%/V
Input offset voltage
–
1, 2
-26
-5
26
mV/V
Table 3. Electrical Specifications (Continued)
Parameter
Symbol
Test
Level
Value
Unit
Note
Min
Typ
Max
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