參數(shù)資料
型號: TS83102G0BMGS
廠商: ATMEL CORP
元件分類: ADC
英文描述: 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CBGA152
封裝: HERMATIC, CI-CGA-152
文件頁數(shù): 24/52頁
文件大?。?/td> 1548K
代理商: TS83102G0BMGS
30
5360A–BDC–06/05
TS83102G0BMGS
7.
Equivalent Input/Output Schematics
Figure 7-1.
Equivalent Analog Input Circuit and ESD Protections
Note:
100
termination midpoint is located inside the package cavity and is DC coupled to ground.
Figure 7-2.
Equivalent Clock Input Circuit and ESD Protections
Note:
100
termination midpoint is on-chip and AC coupled to ground through a 40 pF capacitor.
1 mA
VE
E
=
-
5
V
Die Pads
VIN
VINB
Termination
Resistors
Soldered into
the Package
Cavity
50
2%
GND
50
2%
Package
Pins
ESD
120 fF
VEE = -5V
1.
5V
VEE = -5V
ESD
120 fF
50
Controlled
Transmission Line
(Bonding + Package + Ball)
Double Pad
260 fF
50
Controlled
Transmission Line
(Bonding +
Package + Ball)
Double Pad
260 fF
50
50
VEE = -5V
150
150
VEE = -5V
40 pF
400 A
VEE = -5V
Double Pad
260 fF
ESD
120 fF
ESD
215 fF
ESD
120 fF
CLK
CLKB
Double Pad
260 fF
Double Pad
260 fF
MID
VE
E
=
-5V
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