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參數資料
| 型號： | TVP5020TQFP |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | NTSC/PAL VIDEO DECODER |
| 中文描述： | NTSC / PAL視頻解碼器 |
| 文件頁數： | 40/87頁 |
| 文件大?。?/td> | 387K |
| 代理商： | TVP5020TQFP |
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2–26
2.7.4
VIP Microcode Write Operation
Data is written to the TVP5020 program RAM during the microcode write operation. During the write cycle,
the microprocessor resets and points to location zero in the program and remains reset. Following the first
data phase, the data phase is repeated until all microcode is written. The microprocessor requires a
clear-reset operation upon completion of the write operation. The host performs the reset by writing into the
7F register to clear reset and resume microprocessor function. (There is no specific data to be written into
the 7F register; any data will resume microprocessor function).
COMMAND PHASE
ADDRESS PHASE
DATA PHASE
(to TVP5020)
7
0
6
1
5
0
4
0
3
0
2
0
1
0
0
1
7
0
6
1
5
1
4
1
3
1
2
1
1
1
0
0 D D D D D D D D
7
6
5
4
3
2
1
0
Microcode write
The data phase is repeated to the end of the microcode.
COMMAND PHASE
ADDRESS PHASE
DATA PHASE
(to TVP5020)
7
0
6
1
5
0
4
0
3
0
2
0
1
0
0
1
7
0
6
1
5
1
4
1
3
1
2
1
1
1
0
1 X X X X X X X X
7
6
5
4
3
2
1
0
Clear reset
2.7.5
VIP Microcode Read Operation
Data is read from the TVP5020 program RAM during the microcode read operation. During the read cycle,
the microprocessor resets and points to location zero in the program and remains reset. Following the first
data phase, the data phase is repeated until all microcode is read. The microprocessor requires a clear-reset
operation upon completion of the read operation. The host performs the reset by writing into the 7F register
to clear reset and resume microprocessor function. (There is no specific data to be written into the 7F
register; any data will resume microprocessor function)
.
COMMAND PHASE
ADDRESS PHASE
DATA PHASE
(from TVP5020)
7
0
6
1
5
1
4
0
3
0
2
0
1
0
0
1
7
1
6
0
5
0
4
0
3
1
2
1
1
1
0
0 D D D D D D D D
7
6
5
4
3
2
1
0
Microcode read
The data phase is repeated to the end of the microcode.
COMMAND PHASE
ADDRESS PHASE
DATA PHASE
(to TVP5020)
7
0
6
1
5
0
4
0
3
0
2
0
1
0
0
1
7
0
6
1
5
1
4
1
3
1
2
1
1
1
0
1 X X X X X X X X
7
6
5
4
3
2
1
0
Clear reset
2.8
Video Module Interface (VMI) Host Interface
The VMI host port interface is configurable for three possible modes of operation. The mode of operation
is determined by attaching pullup or pulldown resistors to the GLCO, PALI, and FID terminals. Table 2–7
shows the various modes. (0=pulldown and 1=pullup)
Table 2–7. VMI Host Port Select
TERMINALS
GLCO
2
PALI
1
FID
0
VMI Host Port Mode A
1
0
1
VMI Host Port Mode B
1
1
0
VMI Host Port Mode C
1
1
1
相關PDF資料 |
PDF描述 |
|---|---|
| TVP5031 | NTSC/PAL VIDEO DECODER |
| TVP5031TQFP | NTSC/PAL VIDEO DECODER |
| TVP5031CPFP | Color Decoder Circuit |
| TVR4J | TOSHIBA Fast Recovery Diode Silicon Diffused Type High Speed Rectifier Applications (fast recovery) |
| TVR4N | TOSHIBA Fast Recovery Diode Silicon Diffused Type High Speed Rectifier Applications (fast recovery) |
相關代理商/技術參數 |
參數描述 |
|---|---|
| TVP5021PFP | 功能描述:視頻 IC NTSC/PAL DIGITAL VIDEO DECODER RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| TVP5021PFPG4 | 功能描述:視頻 IC NTSC/PAL DIGITAL VIDEO DECODER RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| TVP5031 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:NTSC/PAL VIDEO DECODER |
| TVP5031CPFP | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Color Decoder Circuit |
| TVP5031PFP | 功能描述:IC 9-BIT VIDEO DECODER 80-QFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉換器 系列:- 產品變化通告:Development Systems Discontinuation 26/Apr/2011 標準包裝:1 系列:- 類型:編碼器 應用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數字:- 安裝類型:- 封裝/外殼:模塊 供應商設備封裝:模塊 包裝:散裝 其它名稱:Q4645799 |
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