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參數(shù)資料
| 型號： | TVP5020TQFP |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | NTSC/PAL VIDEO DECODER |
| 中文描述： | NTSC / PAL視頻解碼器 |
| 文件頁數(shù)： | 70/87頁 |
| 文件大?。?/td> | 387K |
| 代理商： | TVP5020TQFP |
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2–56
2.15.29 TXF Filter #2 Parameters
VIP address
195 – 199
VMI address
I2C address
95 – 99
99 – 99
Address
7
6
5
4
3
2
1
0
95
Filter #2 mask_1[3:0]
Filter #2 pattern_1[3:0]
96
Filter #2 mask_2[3:0]
Filter #2 pattern_2[3:0]
97
Filter #2 mask_3[3:0]
Filter #2 pattern_3[3:0]
98
Filter #2 mask_4[3:0]
Filter #2 pattern_4[3:0]
99
Filter #2 mask_5[3:0]
Filter #2 pattern_5[3:0]
These registers hold the search parameters for Filter #2. The parameters parse the first five bytes of NABTS
teletext transactions or the first two bytes of WST transactions. These bytes of teletext are expected to
always contain four data bits interlaced with four hamming protection bits. The filter ignores the protection
bits.
For an NABTS system, the packet prefix consists of five bytes: P1, P2, P3, CI, and PS. Each byte contains
4 data bits interlaced with 4 hamming protection bits.
Pattern_1[3:0] corresponds to P1[7], P1[5], P1[3], P1[1]
Pattern_2[3:0] corresponds to P2[7], P2[5], P2[3], P2[1]
Pattern_3[3:0] corresponds to P3[7], P3[5], P3[3], P3[1]
Pattern_4[3:0] corresponds to CI[7], CI[5], CI[3], CI[1]
Pattern_5[3:0] corresponds to PS[7], PS[5], PS[3], PS[1]
(packet address)
(packet address)
(packet address)
(continuity index)
(packet structure)
For a WST system (PAL or NTSC), the magazine and row address group consists of two bytes. The two
bytes contain three bits of magazine number (M[2:0]) and 5 bits of row address (R[4:0]), interlaced with eight
hamming protection bits.
Pattern_1[3:0] corresponds to R[0], M[2], M[1], M[0]
Pattern_2[3:0] corresponds to R[4], R[3], R2], R[1]
Pattern_3[3:0] is ignored
Pattern_4[3:0] is ignored
Pattern_5[3:0] is ignored
(magazine and row LSB)
(upper bits of row address)
The mask bits enable filtering using the corresponding bit in the pattern register. For example, A 1 in the LSB
of Mask_1 means that the VBI data processor (VDP) should compare the LSB of Nybble_1 in the pattern
register to the first data bit of the transaction. A 0 in the LSB of Mask_1 means that the VDP should ignore
the first data bit of the transaction.
NOTE:
The TXF filter #2 parameters can only be written and read when both the filter #1
enable and the filter #2 enable bits are 0. When reading the values, the values must
be read consecutively, starting with the TXF filter #1 parameters values.
相關PDF資料 |
PDF描述 |
|---|---|
| TVP5031 | NTSC/PAL VIDEO DECODER |
| TVP5031TQFP | NTSC/PAL VIDEO DECODER |
| TVP5031CPFP | Color Decoder Circuit |
| TVR4J | TOSHIBA Fast Recovery Diode Silicon Diffused Type High Speed Rectifier Applications (fast recovery) |
| TVR4N | TOSHIBA Fast Recovery Diode Silicon Diffused Type High Speed Rectifier Applications (fast recovery) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TVP5021PFP | 功能描述:視頻 IC NTSC/PAL DIGITAL VIDEO DECODER RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| TVP5021PFPG4 | 功能描述:視頻 IC NTSC/PAL DIGITAL VIDEO DECODER RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| TVP5031 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:NTSC/PAL VIDEO DECODER |
| TVP5031CPFP | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Color Decoder Circuit |
| TVP5031PFP | 功能描述:IC 9-BIT VIDEO DECODER 80-QFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標準包裝:1 系列:- 類型:編碼器 應用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應商設備封裝:模塊 包裝:散裝 其它名稱:Q4645799 |
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