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參數(shù)資料
| 型號(hào)： | UPD754244GS-XXX-GJG |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PDSO20 |
| 封裝： | 0.300 INCH, 0.65 MM PITCH, PLASTIC, SSOP-20 |
| 文件頁(yè)數(shù)： | 29/90頁(yè) |
| 文件大?。?/td> | 602K |
| 代理商： | UPD754244GS-XXX-GJG |
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PD754144, 754244
33
Data Sheet U10040EJ2V1DS
Each hardware is initialized by the RESET signal generation as listed in Table 10-1. Figure 10-2 shows the
timing chart of the reset operation.
Figure 10-2. Reset Operation by RESET Signal Generation
Note
In the
PD754144, the wait time is fixed to 56/fcc (56s: @ 1.0-MHz operation).
In the
PD754244, the wait time can be selected from the following two time settings by means of
the mask option.
2
17/fx (21.8 ms : @ 6.0-MHz operation, 31.3 ms: @ 4.19-MHz operation)
2
15/fx (5.46 ms : @ 6.0-MHz operation, 7.81 ms: @ 4.19-MHz operation)
Operation mode or
standby mode
WaitNote
RESET
signal
generated
Operation mode
HALT mode
Internal reset operation
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相關(guān)代理商/技術(shù)參數(shù) |
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| UPD7554AG-597-E2 | 制造商:Renesas Electronics Corporation 功能描述: |
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| UPD7554AG-611-E2 | 制造商:Renesas Electronics Corporation 功能描述: |
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