參數(shù)資料
型號: UPD754244GS-XXX-GJG
元件分類: 微控制器/微處理器
英文描述: 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PDSO20
封裝: 0.300 INCH, 0.65 MM PITCH, PLASTIC, SSOP-20
文件頁數(shù): 6/90頁
文件大小: 602K
代理商: UPD754244GS-XXX-GJG
PD754144, 754244
12
Data Sheet U10040EJ2V1DS
3.4 Recommended Connection of Unused Pins
Table 3-1. List of Recommended Connection of Unused Pins
Pin
Recommended Connecting Method
P30/PTO0
Input state : Independently connect to VSS or VDD via a resistor.
P31/PTO1
Output state: Leave open.
P32/PTO2
P33
P60/AVREF
P61/INT0
P62/PTH00
P63/PTH01
P70/KR4
Connect to VDD.
P71/KR5
P72/KR6
P73/KR7
P80
Input state : Independently connect to VSS or VDD via a resistor.
Output state: Leave open.
KRREN
When this pin is connected to VDD, internal reset signal is gener-
ated at the falling edge of the KRn pin in the STOP mode.
When this pin is connected to VSS, internal reset signal is not
generated even if the falling edge of KRn pin is detected in the
STOP mode.
IC
Connect directly to VDD.
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