參數(shù)資料
型號: V54C316802VB
廠商: Mosel Vitelic, Corp.
英文描述: High Performance 3.3 Volt 2M X 8 Synchronous DRAM(3.3V高性能2Mx8同步動態(tài)RAM)
中文描述: 高性能3.3伏200萬× 8同步DRAM(3.3V的高性能2Mx8同步動態(tài)RAM)的
文件頁數(shù): 50/60頁
文件大?。?/td> 586K
代理商: V54C316802VB
2
V54C316802VB Rev. 1.0 March 1998
MOSEL V ITELIC
V54C316802VB
44 Pin Plastic TSOP-II
PIN CONFIGURATION
Top View
Pin Names
V
CC
I/O
1
V
SSQ
I/O
2
V
CCQ
I/O
3
V
SSQ
I/O
4
V
CCQ
NC
NC
WE
CAS
RAS
CS
A
11
A
10
A
0
A
1
A
2
A
3
V
CC
V
SS
I/O
8
V
SSQ
I/O
7
V
CCQ
I/O
6
V
SSQ
I/O
5
V
CCQ
NC
NC
DQM
CLK
CKE
NC
A
9
A
8
A
7
A
6
A
5
A
4
V
SS
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
1
2
3
4
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
31161600 02
44
43
CLK
Clock Input
CKE
Clock Enable
CS
Chip Select
RAS
Row Address Strobe
CAS
Column Address Strobe
WE
Write Enable
A
0
–A
10
Address Inputs
A
11
(BS)
Bank Select
I/O
1
–I/O
8
Data Input/Output
DQM, LDQM, UDQM
Data Mask
V
CC
Power (+3.3V)
V
SS
Ground
V
CCQ
Power for I/O’s (+3.3V)
V
SSQ
Ground for I/O’s
NC
Not connected
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