參數資料
型號: VS1003
廠商: Electronic Theatre Controls, Inc.
元件分類: Codec
英文描述: MP3 / WMA AUDIO CODEC
中文描述: MP3播放/ WMA音頻編解碼器
文件頁數: 46/57頁
文件大?。?/td> 456K
代理商: VS1003
VLSI
Solution
y
VS1003 PRELIMINARY
VS1003
10. VS1003 REGISTERS
10.10
Watchdog
v1.0 2002-08-26
The watchdog consist of a watchdog counter and some logic. After reset, the watchdog is inactive.
The counter reload value can be set by writing to WDOG CONFIG. The watchdog is activated by writ-
ing 0x4ea9 to register WDOG RESET. Every time this is done, the watchdog counter is reset. Every
65536’th clock cycle the counter is decremented by one. If the counter underflows, it will activate vs-
dsp’s internal reset sequence.
Thus, after the first 0x4ea9 write to WDOG RESET, subsequent writes to the same register with the
same value must be made no less than every
65536
×
WDOG CONFIG clock cycles.
Once started, the watchdog cannot be turned off. Also, a write to WDOG CONFIG doesn’t change the
counter reload value.
Afterwatchdoghasbeenactivated, anyread/writeoperationfrom/toWDOG CONFIGorWDOG DUMMY
will invalidate the next write operation to WDOG RESET. This will prevent runaway loops from re-
setting the counter, even if they do happen to write the correct number. Writing a wrong value to
WDOG RESET will also invalidate the next write to WDOG RESET.
Reads from watchdog registers return undefined values.
10.10.1
Registers
Watchdog, prefix WDOG
Reset
Abbrev
0
CONFIG
0
RESET
0
DUMMY[-]
Reg
Type
w
w
w
Description
Configuration
Clock configuration
Dummy register
0xC020
0xC021
0xC022
Version 0.92,
2005-06-07
46
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