參數(shù)資料
型號： W228BH
英文描述： CPU SYSTEM CLOCK GENERATOR|CMOS|SSOP|56PIN|PLASTIC
中文描述： CPU系統(tǒng)時鐘發(fā)生器|的CMOS | SSOP封裝| 56PIN |塑料
文件頁數(shù)： 10/16頁
文件大?。?/td> 172K
代理商： W228BH
W228B
Document #: 38-07180 Rev. **
Page 10 of 16
Byte 3: Reserved Register (1 = Enable, 0 = Disable)
Bit
Pin#
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
Pin Description
-
-
-
-
-
-
Reserved Drive to
’
0
’
Reserved Drive to
’
0
’
Reserved Drive to
’
0
’
Reserved Drive to
’
0
’
Reserved Drive to
’
0
’
Reserved Drive to
’
0
’
Reserved Drive to
’
0
’
SDRAM 133-MHz Mode Enable
Default is Disabled =
’
0
’
, Enabled =
’
1
’
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Disabled/Enabled)
-
Byte 4: Reserved Register (1 = Enable, 0 = Disable)
Bit
Pin#
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
Pin Description
-
-
-
-
-
-
Reserved Drive to
’
0
’
Reserved Drive to
’
0
’
Reserved Drive to
’
0
’
Reserved Drive to
’
0
’
Reserved Drive to
’
0
’
Reserved Drive to
’
0
’
Reserved Drive to
’
0
’
Reserved Drive to
’
0
’
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
-
相關(guān)PDF資料
PDF描述
W229B Clocks and Buffers
W22B64A-15 x4 SRAM
W22B64A-20 x4 SRAM
W22B64A-25 x4 SRAM
W22B64AJ-15 x4 SRAM
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