- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄202121 > W25Q80BVSNAP (WINBOND ELECTRONICS CORP) 8M X 1 SPI BUS SERIAL EEPROM, PDSO8 PDF資料下載
參數(shù)資料
| 型號(hào)： | W25Q80BVSNAP |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | PROM |
| 英文描述： | 8M X 1 SPI BUS SERIAL EEPROM, PDSO8 |
| 封裝： | 0.150 INCH, GREEN, PLASTIC, SOIC-8 |
| 文件頁數(shù)： | 33/75頁 |
| 文件大?。?/td> | 1055K |
| 代理商： | W25Q80BVSNAP |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁當(dāng)前第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁
W25Q80BV
Publication Release Date: October 06, 2010
- 39 -
Revision D
9.2.21
Page Program (02h)
The Page Program instruction allows from one byte to 256 bytes (a page) of data to be programmed at
previously erased (FFh) memory locations. A Write Enable instruction must be executed before the
device will accept the Page Program Instruction (Status Register bit WEL= 1). The instruction is initiated
by driving the /CS pin low then shifting the instruction code “02h” followed by a 24-bit address (A23-A0)
and at least one data byte, into the DI pin. The /CS pin must be held low for the entire length of the
instruction while data is being sent to the device. The Page Program instruction sequence is shown in
figure 19.
If an entire 256 byte page is to be programmed, the last address byte (the 8 least significant address bits)
should be set to 0. If the last address byte is not zero, and the number of clocks exceed the remaining
page length, the addressing will wrap to the beginning of the page. In some cases, less than 256 bytes (a
partial page) can be programmed without having any effect on other bytes within the same page. One
condition to perform a partial page program is that the number of clocks can not exceed the remaining
page length. If more than 256 bytes are sent to the device the addressing will wrap to the beginning of the
page and overwrite previously sent data.
As with the write and erase instructions, the /CS pin must be driven high after the eighth bit of the last
byte has been latched. If this is not done the Page Program instruction will not be executed. After /CS is
driven high, the self-timed Page Program instruction will commence for a time duration of tpp (See AC
Characteristics). While the Page Program cycle is in progress, the Read Status Register instruction may
still be accessed for checking the status of the BUSY bit. The BUSY bit is a 1 during the Page Program
cycle and becomes a 0 when the cycle is finished and the device is ready to accept other instructions
again. After the Page Program cycle has finished the Write Enable Latch (WEL) bit in the Status Register
is cleared to 0. The Page Program instruction will not be executed if the addressed page is protected by
the Block Protect (CMP, SEC, TB, BP2, BP1, and BP0) bits.
/CS
CLK
DI
(IO
0)
Mode 0
Mode 3
0
1
2
3
4
5
6
7
Instruction (02h)
8
9
10
28
29
30
39
24-Bit Address
23
22
21
3
2
1
*
/CS
CLK
40
DI
(IO
0)
41
42
43
44
45
46
47
Data Byte 2
48
49
50
52
53
54
55
20
72
51
39
7
6
5
4
3
2
1
0
31
0
32
33
34
35
36
37
38
Data Byte 1
7
6
5
4
3
2
1
*
Mode 0
Mode 3
Data Byte 3
20
73
20
74
20
75
20
76
20
77
20
78
20
79
0
Data Byte 256
*
7
6
5
4
3
2
1
0
*
7
6
5
4
3
2
1
0
*
= MSB
*
Figure 19. Page Program Instruction Sequence Diagram
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| WV3EG128M72EFSR262D3MG | 128M X 72 DDR DRAM MODULE, 0.75 ns, DMA184 |
| W7NCF08GH10CS4FM1G | FLASH 3.3V PROM MODULE, XMA50 |
| W7NCF08GH10CSA5DM1G | FLASH 3.3V PROM MODULE, XMA50 |
| W7NCF08GH10IS8BM1G | FLASH 3.3V PROM MODULE, XMA50 |
| W7NCF08GH10ISA4HM1G | FLASH 3.3V PROM MODULE, XMA50 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W25Q80BVSNIG | 功能描述:IC SPI FLASH 8MBIT 8SOIC RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:SpiFlash® 標(biāo)準(zhǔn)包裝:2,000 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SRAM - 異步 存儲(chǔ)容量:256K (32K x 8) 速度:15ns 接口:并聯(lián) 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:28-TSSOP（0.465"，11.8mm 寬） 供應(yīng)商設(shè)備封裝:28-TSOP 包裝:帶卷 (TR) 其它名稱:71V256SA15PZGI8 |
| W25Q80BVSNIG TR | 制造商:Winbond Electronics Corp 功能描述: 制造商:Winbond Electronics Corp 功能描述:IC FLASH 8MBIT 104MHZ 8SOIC |
| W25Q80BVSNIP | 制造商:WINBOND 制造商全稱:Winbond 功能描述:8M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI |
| W25Q80BVSSAG | 制造商:WINBOND 制造商全稱:Winbond 功能描述:8M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI |
| W25Q80BVSSAP | 制造商:WINBOND 制造商全稱:Winbond 功能描述:8M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。