- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄202121 > W25Q80BVSNAP (WINBOND ELECTRONICS CORP) 8M X 1 SPI BUS SERIAL EEPROM, PDSO8 PDF資料下載
參數(shù)資料
| 型號(hào)： | W25Q80BVSNAP |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | PROM |
| 英文描述： | 8M X 1 SPI BUS SERIAL EEPROM, PDSO8 |
| 封裝： | 0.150 INCH, GREEN, PLASTIC, SOIC-8 |
| 文件頁(yè)數(shù)： | 51/75頁(yè) |
| 文件大?。?/td> | 1055K |
| 代理商： | W25Q80BVSNAP |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)當(dāng)前第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)
W25Q80BV
Publication Release Date: October 06, 2010
- 55 -
Revision D
9.2.36 Read SFDP Register (5Ah)
The W25Q80BV features a 256-Byte Serial Flash Discoverable Parameter (SFDP) register that contains
information about devices operational capability such as available commands, timing and other features.
The SFDP parameters are stored in one or more Parameter Identification (PID) tables. Currently only one
PID table is specified but more may be added in the future. The Read SFDP Register instruction is
compatible with the SFDP standard initially established in 2010 for PC and other applications. Most
Winbond SpiFlash Memories shipped after June 2010 (date code 1023 and beyond) support the SFDP
feature as specified in the applicable datasheet.
The Read SFDP instruction is initiated by driving the /CS pin low and shifting the instruction code “5Ah”
followed by a 24-bit address (A23-A0)
(1) into the DI pin. Eight “dummy” clocks are also required before the
SFDP register contents are shifted out on the falling edge of the 40
th CLK with most significant bit (MSB)
first as shown in figure 34. For SFDP register values and descriptions, refer to the following SFDP
Definition table.
Note: 1. A23-A8 = 0; A7-A0 are used to define the starting byte address for the 256-Byte SFDP Register.
/CS
CLK
DI
(IO
0)
DO
(IO
1)
Mode 0
Mode 3
0
1
2
3
4
5
6
7
Instruction (5Ah)
High Impedance
8
9
10
28
29
30
31
24-Bit Address
23
22
21
3
2
1
0
Data Out 1
(IO
0)
DO
(IO
1)
*
/CS
CLK
DI
32
33
34
35
36
37
38
39
Dummy Byte
40
41
42
44
45
46
47
48
49
50
51
52
53
54
55
High Impedance
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
43
31
0
Data Out 2
*
7
6
5
4
3
2
1
0
= MSB
*
Figure 34. Read SFDP Register Instruction Sequence Diagram
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| WV3EG128M72EFSR262D3MG | 128M X 72 DDR DRAM MODULE, 0.75 ns, DMA184 |
| W7NCF08GH10CS4FM1G | FLASH 3.3V PROM MODULE, XMA50 |
| W7NCF08GH10CSA5DM1G | FLASH 3.3V PROM MODULE, XMA50 |
| W7NCF08GH10IS8BM1G | FLASH 3.3V PROM MODULE, XMA50 |
| W7NCF08GH10ISA4HM1G | FLASH 3.3V PROM MODULE, XMA50 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W25Q80BVSNIG | 功能描述:IC SPI FLASH 8MBIT 8SOIC RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:SpiFlash® 標(biāo)準(zhǔn)包裝:2,000 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SRAM - 異步 存儲(chǔ)容量:256K (32K x 8) 速度:15ns 接口:并聯(lián) 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:28-TSSOP（0.465"，11.8mm 寬） 供應(yīng)商設(shè)備封裝:28-TSOP 包裝:帶卷 (TR) 其它名稱:71V256SA15PZGI8 |
| W25Q80BVSNIG TR | 制造商:Winbond Electronics Corp 功能描述: 制造商:Winbond Electronics Corp 功能描述:IC FLASH 8MBIT 104MHZ 8SOIC |
| W25Q80BVSNIP | 制造商:WINBOND 制造商全稱:Winbond 功能描述:8M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI |
| W25Q80BVSSAG | 制造商:WINBOND 制造商全稱:Winbond 功能描述:8M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI |
| W25Q80BVSSAP | 制造商:WINBOND 制造商全稱:Winbond 功能描述:8M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。