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參數(shù)資料
| 型號： | XA3SD3400A-4CSG484I |
| 廠商： | Xilinx Inc |
| 文件頁數(shù)： | 23/58頁 |
| 文件大小： | 0K |
| 描述： | SPARTAN-3ADSP FPGA 3400K 484CSBG |
| 產(chǎn)品培訓(xùn)模塊： | Extended Spartan 3A FPGA Family |
| 標(biāo)準(zhǔn)包裝： | 84 |
| 系列： | Spartan®-3A DSP XA |
| LAB/CLB數(shù)： | 5968 |
| 邏輯元件/單元數(shù)： | 53712 |
| RAM 位總計(jì)： | 2322432 |
| 輸入/輸出數(shù)： | 309 |
| 門數(shù)： | 3400000 |
| 電源電壓： | 1.14 V ~ 1.26 V |
| 安裝類型： | 表面貼裝 |
| 工作溫度： | -40°C ~ 100°C |
| 封裝/外殼： | 484-FBGA，CSPBGA |
| 供應(yīng)商設(shè)備封裝： | 484-CSPBGA |
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XA Spartan-3A DSP Automotive FPGA Family Data Sheet
DS705 (v2.0) April 18, 2011
Product Specification
3
Configuration
XA Spartan-3A DSP FPGAs are programmed by loading configuration data into robust, reprogrammable, static CMOS
configuration latches (CCLs) that collectively control all functional elements and routing resources. The FPGA’s
configuration data is stored externally in a PROM or some other non-volatile medium, either on or off the board.
After applying power, the configuration data is written to the FPGA using any of five different modes:
Serial Peripheral Interface (SPI) from an industry-standard SPI serial Flash
Byte Peripheral Interface (BPI) Up from an industry-standard x8 or x8/x16 parallel NOR Flash
Slave Serial, typically downloaded from a processor
Slave Parallel, typically downloaded from a processor
Boundary-scan (JTAG), typically downloaded from a processor or system tester
Additionally, each XA Spartan-3A DSP FPGA contains a unique, factory-programmed Device DNA identifier useful for
tracking purposes, anti-cloning designs, or IP protection.
X-Ref Target - Figure 1
Figure 1: XA Spartan-3A DSP Family Architecture
CLB
Block
RAM
DCM
IOBs
DS705_01_061908
IOBs
DCM
Block
RAM
/
DSP48A
Slice
DCM
CLBs
IOBs
DSP48A
Slice
Notes:
1. The XA3SD1800A and XA3SD3400A have two DCMs on both the left and right sides, as well as the two DCMs at the top and
bottom of the devices. The two DCMs on the left and right of the chips are in the middle of the outer block RAM/DSP48A
columns of the four or five columns in the selected device, as shown in the diagram.
2. A detailed diagram of the DSP48A can be found in UG431, XtremeDSP DSP48A for Spartan-3A DSP FPGAs User Guide.
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| XA3SD3400A-4FGG676I | 功能描述:SPARTAN-3ADSP FPGA 3400K 676FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:Spartan®-3A DSP XA 產(chǎn)品變化通告:Step Intro and Pkg Change 11/March/2008 標(biāo)準(zhǔn)包裝:1 系列:Virtex®-5 SXT LAB/CLB數(shù):4080 邏輯元件/單元數(shù):52224 RAM 位總計(jì):4866048 輸入/輸出數(shù):480 門數(shù):- 電源電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:1136-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5 |
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