參數(shù)資料
型號： XE8801AMI027LF
廠商： Semtech
文件頁數(shù)： 25/135頁
文件大?。?/td> 0K
描述： IC DAS 16BIT FLASH 8K MTP 44LQFP
標(biāo)準(zhǔn)包裝： 800
系列： XE880x
應(yīng)用： 感測機(jī)
核心處理器： Coolrisc816?
程序存儲器類型： 閃存（22 kB）
控制器系列： XE8000
RAM 容量： 512 x 8
接口： UART，USRT
輸入/輸出數(shù)： 24
電源電壓： 2.4 V ~ 5.5 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 44-VFQFN 裸露焊盤
包裝： 托盤
供應(yīng)商設(shè)備封裝： 44-MLPQ（7x7）
產(chǎn)品目錄頁面： 585 (CN2011-ZH PDF)
配用： XE8000MP-ND - PROG BOARD AND PROSTART2 CARD
Semtech 2005
www.semtech.com
18-2
XE8801A – SX8801R
18.1 Features
4 x 8-bits timer/counter modules or 2 x 16-bits timers/counter modules
Each with 4 possible clock sources
Up/down counter modes
Interrupt and event generation
Capture function (internal or external source)
Rising, falling or both edge of capture signal
PA[3:0] can be used as clock inputs (debounced or direct)
2 x 8 bits PWM or 2 x 16 bits PWM
PWM resolution of 8, 10, 12, 14 or 16 bits
Complex mode combinations are possible between counter, capture and PWM modes
18.2 Overview
CounterA and CounterB are 8-bit counters and can be combined to form a 16-bit counter. CounterC and CounterD
exhibit the same features.
The counters can also be used to generate two PWM outputs on PB[0] and PB[1]. In PWM mode one can generate
PWM functions with 8, 10, 12, 14 or 16 bit wide counters.
The counters A and B can be captured by events on an internal or an external signal. The capture can be
performed on both 8-bit counters running individually on two different clock sources or on both counters chained to
form a 16-bit counter. In any case, the same capture signal is used for both counters.
When the counters A and B are not chained, they can be used in several configurations: A and B as counters, A
and B as captured counters, A as PWM and B as counter, A as PWM and B as captured counter.
When the counters C and D are not chained, they can be used either both as counters or counter C as PWM and
counter D as counter.
18.3 Register map
Bit
RegCntA
rw
reset
function
7-0
CounterA
r
xxxxxxxx
8-bits counter value
7-0
CounterA
w
xxxxxxxx
8-bits comparison value
Table 18-1. RegCntA
bit
RegCntB
rw
reset
function
7-0
CounterB
r
xxxxxxxx
8-bits counter value
7-0
CounterB
w
xxxxxxxx
8-bits comparison value
Table 18-2. RegCntB
Note: When writing to RegCntA or RegCntB, the processor writes the counter comparison values. When reading
these locations, the processor reads back either the actual counter value or the last captured value if the capture
mode is active.
bit
RegCntC
rw
reset
function
7-0
CounterC
r
xxxxxxxx
8-bits counter value
7-0
CounterC
w
xxxxxxxx
8-bits comparison value
Table 18-3. RegCntC
Not
Recommended
for
New
Designs
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