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參數資料
型號: XE8801AMI027LF
廠商: Semtech
文件頁數: 71/135頁
文件大?。?/td> 0K
描述: IC DAS 16BIT FLASH 8K MTP 44LQFP
標準包裝: 800
系列: XE880x
應用: 感測機
核心處理器: Coolrisc816?
程序存儲器類型: 閃存(22 kB)
控制器系列: XE8000
RAM 容量: 512 x 8
接口: UART,USRT
輸入/輸出數: 24
電源電壓: 2.4 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 44-VFQFN 裸露焊盤
包裝: 托盤
供應商設備封裝: 44-MLPQ(7x7)
產品目錄頁面: 585 (CN2011-ZH PDF)
配用: XE8000MP-ND - PROG BOARD AND PROSTART2 CARD
Semtech 2005
www.semtech.com
6-6
XE8801A – SX8801R
Symbol
Parameter
Min
Typ
Max
Unit
Comments
TPOR
POR reset duration
5
20
ms
TRESET
RESET pin reset duration
20
200
s
3
TRESET
RESET pin reset duration
5
20
ms
4
Vbat_sl_M
Supply ramp up of MTP version
20
V/ms
1
Vbat_sl_R
Supply ramp up of ROM version
0.25
V/ms
1
WDtime
Watchdog timeout period
2
s
2
Table 6-5. Electrical and timing specifications
Note: 1) The Vbat_sl defines the minimum slope required on VBAT. Correct start-up of the circuit is not guaranteed
if this slope is too slow. In such a case, a delay has to be built using the RESET pin.
Note: 2) The minimal watchdog timeout period is guaranteed when the internal oscillators are used. The watchdog
takes its clock from the low prescaler. In case an external clock source is used, the RC oscillator must be enabled
also (EnRC=1 in RegSysClock). Otherwise, the watchdog is stopped (see the clock block documentation).
Note: 3) For the circuit versions XE88LC01 and XE88LC05. Gives the time the reset is active after the falling edge
of the RESET pin.
Note: 4) For the circuit versions XE88LC01A and XE88LC05A. Gives the time the reset is active after the falling
edge of the RESET pin.
Not
Recommended
for
New
Designs
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