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參數(shù)資料
| 型號： | XR16C864 |
| 廠商： | Exar Corporation |
| 元件分類： | 通用總線功能 |
| 英文描述： | Quad UART with RX/TX FIFO Counters and 128-byte FIFO(四通用異步接收器/發(fā)送器（帶RX/TX 先進先出計數(shù)器和128字節(jié)先進先出）) |
| 中文描述： | 四路與異步接收/發(fā)送FIFO的計數(shù)器和128字節(jié)的FIFO（四通用異步接收器/發(fā)送器（帶了Rx / Tx先進先出計數(shù)器和128字節(jié)先進先出）） |
| 文件頁數(shù)： | 11/46頁 |
| 文件大?。?/td> | 381K |
| 代理商： | XR16C864 |
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XR16C864
11
Rev. 1.10
GENERAL DESCRIPTION
The 864 provides serial asynchronous receive data
synchronization, parallel-to-serial and serial-to-parallel
data conversions for both the transmitter and receiver
sections. These functions are necessary for converting
the serial data stream into parallel data that is required
with digital data systems. Synchronization for the serial
data stream is accomplished by adding start and stops
bits to the transmit data to form a data character
(character orientated protocol). Data integrity is en-
sured by attaching a parity bit to the data character. The
parity bit is checked by the receiver for any transmission
bit errors. The electronic circuitry to provide all these
functions is fairly complex especially when manufac-
tured on a single integrated silicon chip. The XR16C864
represents such an integration with greatly enhanced
features. The 864 is fabricated with an advanced CMOS
process to achieve low drain power and high speed
requirements.
The 864 is an upward solution that provides 128 bytes
of transmit and receive FIFO memory, instead of 64/16
bytes in provided in the 16C654/554, or none in the
16C454. The 864 is designed to work with high speed
modems and shared network environments, that require
fast data processing time. Increased performance is
realized in the 864 by the larger transmit and receive
FIFO’s. This allows the external processor to handle
more networking tasks within a given time. For ex-
ample, the ST16C554 with a 16 byte FIFO, unloads 16
bytes of receive data in 1.53 ms (This example uses a
character length of 11 bits, including start/stop bits at
115.2Kbps). This means the external CPU will have to
service the receive FIFO at 1.53 ms intervals. However
with the 128 byte FIFO in the 864, the data buffer will not
require unloading/loading for 12.2 ms. This increases
the service interval giving the external CPU additional
time for other applications and reducing the overall
UART interrupt servicing time. In addition, the 4 select-
able levels of FIFO trigger interrupt and automatic
hardware/software flow control is uniquely provided for
maximum data throughput performance especially
when operating in a multi-channel environment. The
combination of the above greatly reduces the bandwidth
requirement of the external controlling CPU, increases
performance, and reduces power consumption.
The 864 combines the package interface modes of the
16C554/654 and 68/C554/654 series on a single inte-
grated chip. The 16 mode interface is designed to
operate with the Intel type of microprocessor bus while
the 68 mode is intended to operate with Motorola, and
other popular microprocessors. Following a reset, the
864 is down-ward compatible with the ST16C454/
ST68C454 or the ST68C454/ST68C554 dependent on
the state of the interface mode selection pin, 16/-68.
The 864 is capable of operation to 1.5Mbps with a 24
MHz crystal or external clock input. With a crystal of
14.7464 MHz and through a software option, the user
can select data rates up to 460.8Kbps or 921.6Kbps.
The rich feature set of the 864 is available through
internal registers. Automatic hardware/software flow
control, selectable transmit and receive FIFO trigger
levels, selectable TX and RX baud rates, infrared
encoder/decoder interface, modem interface con-
trols, and a sleep mode are all standard features. MCR
bit-5 provides a facility for turning off (Xon) software
flow control with any incoming (RX) character. In the
16 mode INTSEL and MCR bit-3 can be configured to
provide a software controlled or continuous interrupt
capability.
The XR16C864 offers a clock select pin to allow system/
board designers to preset the default baud rate table.
The CLKSEL pin selects the div-by-1 or div-by-4 pre-
scaleable baud rate generator table during initialization,
but can be overridden following initialization by MCR bit-
7.
The XR16C864 offer several enhanced features. These
features include a separate channel C (MIDI) clock
input, an internal FIFO monitor register, and separate
IrDA TX outputs. The MIDI (Musical Instrument Digital
Interface) can be connected to the XTAL2 pin for normal
operation or to external MIDI oscillator for MIDI applica-
tions. A separate register is provided for monitoring the
real time status of the FIFO signals -TXRDY and -
RXRDY for each of the four UART channels (A-D). This
reduces polling time involved in accessing individual
channels. The 100 pin QFP package also offers, four
separate IrDA (Infrared Data Association Standard)
outputs for Infrared applications. These outputs are
provided in addition to the standard asynchronous
modem data outputs.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| XR16C864CQ | 制造商:Rochester Electronics LLC 功能描述: 制造商:Exar Corporation 功能描述: |
| XR16C864CQ-0A-EVB | 功能描述:UART 接口集成電路 Supports C864 100 ld QFP, ISA Interface RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR16C864CQ-0B-EB | 功能描述:界面開發(fā)工具 Eval Board for XR16C864CQ Series RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
| XR16C864CQ-F | 功能描述:UART 接口集成電路 UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR16C864CQTR-F | 功能描述:UART 接口集成電路 UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
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