參數(shù)資料
型號(hào): XR16C864
廠商: Exar Corporation
元件分類: 通用總線功能
英文描述: Quad UART with RX/TX FIFO Counters and 128-byte FIFO(四通用異步接收器/發(fā)送器(帶RX/TX 先進(jìn)先出計(jì)數(shù)器和128字節(jié)先進(jìn)先出))
中文描述: 四路與異步接收/發(fā)送FIFO的計(jì)數(shù)器和128字節(jié)的FIFO(四通用異步接收器/發(fā)送器(帶了Rx / Tx先進(jìn)先出計(jì)數(shù)器和128字節(jié)先進(jìn)先出))
文件頁(yè)數(shù): 7/46頁(yè)
文件大小: 381K
代理商: XR16C864
XR16C864
7
Rev. 1.10
SYMBOL DESCRIPTION
-DSR A-B
-DSR C-D
7,23
58,74
Data Set Ready (active low) - These inputs are associated with individual
UART channels, A through D. A logic 0 on this pin indicates the modem or
data set is powered-on and is ready for data exchange with the UART. This
pin has no effect on the UART’s transmit or receive operation.
I
-DTR A-B
-DTR C-D
9,21
60,72
Data Terminal Ready (active low) - These inputs are associated with
individual UART channels, A through D. A logic 0 on this pin indicates that
the 864 is powered-on and ready. This pin can be controlled via the modem
control register. Writing a logic 1 to MCR bit-0 will set the -DTR output to logic
0, enabling the modem. This pin will be a logic 1 after writing a logic 0 to MCR
bit-0, or after a reset. This pin has no effect on the UART’s transmit or receive
operation.
O
-RI A-B
-RI C-D
98,33
48,84
Ring Indicator (active low) - These inputs are associated with individual UART
channels, A through D. A logic 0 on this pin indicates the modem has
received a ringing signal from the telephone line. A logic 1 transition on this
input pin can be used to generate an interrupt.
I
-RTS A-B
-RTS C-D
11,19
62,70
Request to Send (active low) - These outputs are associated with individual
UART channels, A through D. A logic 0 on the -RTS pin indicates the
transmitter has data ready and waiting to send. Writing a logic 1 in the
modem control register (MCR bit-1) will set this pin to a logic 0 indicating data
is available. After a reset this pin will be set to a logic 1. This pin only affects
the transmit and receive operations when Auto RTS function is enabled via
the Enhanced Feature Register (EFR) bit-6, for hardware flow control
operation.
O
RX/IRRX A-B
RX/IRRX C-D
97,34
47,85
Receive Data Input RX/IRRX A-D. - These inputs are associated with
individual serial channel data to the XR16C864. Two user selectable nterface
options are available. The first option supports the standard modem
interface. The second option provides an Infrared decoder interface, see
figures 2 and 3. When using the standard modem interface, the RX signal will
be a logic 1 during reset, idle (no data), or when the transmitter is disabled.
The inactive state (no data) for the Infrared decoder interface is a logic 0. MCR
bit-6 selects the standard modem or infrared interface. During the local loop-
back mode, the RX input pin is disabled and TX data is internally connected
to the UART RX input.
I
Symbol
Pin
100
Signal
type
Pin Description
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