參數(shù)資料
型號: XRT75R06DIB
廠商: EXAR CORP
元件分類: 數(shù)字傳輸電路
英文描述: SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
中文描述: DATACOM, PCM TRANSCEIVER, PBGA217
封裝: 23 X 23 MM, BGA-217
文件頁數(shù): 33/105頁
文件大小: 591K
代理商: XRT75R06DIB
á
SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
XRT75R06D
REV. 1.0.0
28
4.4
The Transmit Pulse Shaper converts the B3ZS encoded digital pulses into a single analog Alternate Mark
Inversion (AMI) pulse that meets the industry standard mask template requirements for STS-1 and DS3. For
E3 mode, the pulse shaper converts the HDB3 encoded pulses into a single full amplitude square shaped
pulse with very little slope. The Pulse Shaper Block also includes a Transmit Build Out Circuit, which can
either be disabled or enabled by setting the TxLEV_n bit to “1” or “0” in the control register. For DS3/STS-1
rates, the Transmit Build Out Circuit is used to shape the transmit waveform that ensures that transmit pulse
template requirements are met at the Cross-Connect system. The distance between the transmitter output and
the Cross-Connect system can be between 0 to 450 feet. For E3 rate, since the output pulse template is
measured at the secondary of the transformer and since there is no Cross-Connect system pulse template
requirements, the Transmit Build Out Circuit is always disabled. The differential line driver increases the
transmit waveform to appropriate level and drives into the 75
load as shown in Figure 21.
F
IGURE
21. T
RANSMIT
P
ULSE
S
HAPE
T
EST
C
IRCUIT
T
RANSMIT
P
ULSE
S
HAPER
4.4.1
If the distance between the transmitter and the DSX3 or STSX-1, Cross-Connect system, is less than 225 feet,
enable the Transmit Build Out Circuit by setting the TxLEV_n control bit to “0”. If the distance between the
transmitter and the DSX3 or STSX-1 is greater than 225 feet, disable the Transmit Build Out Circuit.
Guidelines for using Transmit Build Out Circuit
F
IGURE
20. HDB3 E
NCODING
F
ORMAT
0
0
0
0
0
1
1
1
1
1
1
1
V
B
V
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
V
0
0
0
TClk
Line
Signal
TPDATA
TTIP(n)
TRing(n)
1:1
R3
75
TxPOS(n)
TxNEG(n)
TxLineClk(n)
TPData(n)
TNData(n)
TxClk(n)
31.6
+ 1%
31.6
+1%
R1
R2
相關PDF資料
PDF描述
XRT75R06 SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
XRT75R06IB SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
XRT75R12D TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
XRT75R12DIB TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
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