參數(shù)資料
型號(hào): XRT75R06DIB
廠商: EXAR CORP
元件分類: 數(shù)字傳輸電路
英文描述: SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
中文描述: DATACOM, PCM TRANSCEIVER, PBGA217
封裝: 23 X 23 MM, BGA-217
文件頁(yè)數(shù): 43/105頁(yè)
文件大?。?/td> 591K
代理商: XRT75R06DIB
á
SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
XRT75R06D
REV. 1.0.0
38
The jitter attenuator within the XRT75R06D meets the latest jitter attenuation specifications and/or jitter
transfer characteristics as shown in the Figure 29.
5.3.1
Jitter Generation is defined as the process whereby jitter appears at the output port of the digital equipment in
the absence of applied input jitter. Jitter Generation is measured by sending jitter free data to the clock and
data recovery circuit and measuring the amount of jitter on the output clock or the re-timed data. Since this is
essentially a noise measurement, it requires a definition of bandwidth to be meaningful. The bandwidth is set
according to the data rate. In general, the jitter is measured over a band of frequencies.
J
ITTER
G
ENERATION
T
ABLE
10: J
ITTER
T
RANSFER
P
ASS
M
ASKS
R
ATE
(
KBITS
)
M
ASK
F1
(H
Z
)
F2
(H
Z
)
F3
(H
Z
)
F4
(
K
H
Z
)
A1(dB)
A2(dB)
34368
G.823
ETSI-TBR-24
100
300
3
K
800
K
0.5
-19.5
44736
GR-499, Cat I
GR-499, Cat II
GR-253 CORE
10
10
10
10k
56.6k
40
-
-
-
15k
300k
15k
0.1
0.1
0.1
-
-
-
51840
GR-253 CORE
10
40k
-
400k
0.1
-
F
IGURE
29. J
ITTER
T
RANSFER
R
EQUIREMENTS
AND
J
ITTER
A
TTENUATOR
P
ERFORMANCE
F 1
A 1
F 2
J
JIT T E R F R E Q U E N C Y (kH z)
A 2
F 3
F 4
相關(guān)PDF資料
PDF描述
XRT75R06 SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
XRT75R06IB SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
XRT75R12D TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
XRT75R12DIB TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
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