參數(shù)資料
型號： XRT83SL34IV-F
廠商： Exar Corporation
文件頁數(shù)： 67/80頁
文件大?。?/td> 0K
描述： IC LIU T1/E1/J1 QUAD 128TQFP
標(biāo)準(zhǔn)包裝： 72
類型： 線路接口裝置（LIU）
驅(qū)動器/接收器數(shù)： 4/4
規(guī)程： T1，E1，J1
電源電壓： 3.135 V ~ 3.465 V
安裝類型： 表面貼裝
封裝/外殼： 128-LQFP
供應(yīng)商設(shè)備封裝： 128-TQFP（14x20）
包裝： 托盤
XRT83SL34
QUAD T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. 1.0.0
4
PIN DESCRIPTION BY FUNCTION
RECEIVE SECTIONS
SIGNAL NAME
PIN #TYPE
DESCRIPTION
RLOS_0
RLOS_1
RLOS_2
RLOS_3
4
28
75
99
O
Receiver Loss of Signal for Channel _0
This output signal goes ‘High’ for at least one RCLK_0 cycle to indicate loss
of signal at the receive 0 input. RLOS will remain “High” for the entire dura-
tion of the loss of signal detected by the receiver logic.
Receiver Loss of Signal for Channel _1
Receiver Loss of Signal for Channel _2
Receiver Loss of Signal for Channel _3
RCLK_0
RCLK_1
RCLK_2
RCLK_3
5
27
76
98
O
Receiver Clock Output for Channel _0
Receiver Clock Output for Channel _1
Receiver Clock Output for Channel _2
Receiver Clock Output for Channel _3
RNEG_0
LCV_0
RNEG_1
LCV_1
RNEG_1
LCV_2
RNEG_1
LCV_3
6
26
77
97
O
Receiver Negative Data Output for Channel _0 - Dual-Rail mode
This signal is the receiver negative-rail output data.
Line Code Violation Output for Channel _0 - Single-Rail mode
This signal goes ‘High’ for one RCLK_0 cycle to indicate a code violation is
detected in the received data of Channel _0. If AMI coding is selected, every
bipolar violation received will cause this pin to go “High”.
Receiver Negative Data Output for Channel _1
Line Code Violation Output for Channel _1
Receiver Negative Data Output for Channel _2
Line Code Violation Output for Channel _2
Receiver Negative Data Output for Channel _3
Line Code Violation Output for Channel _3
RPOS_0
RDATA_0
RPOS_1
RDATA_1
RPOS_2
RDATA_2
RPOS_3
RDATA_3
7
25
78
96
O
Receiver Positive Data Output for Channel _0 - Dual-Rail mode
This signal is the receive positive-rail output data sent to the Framer.
Receiver NRZ Data Output for Channel _0 - Single-Rail mode
This signal is the receive output data.
Receiver Positive Data Output for Channel _1
Receiver NRZ Data Output for Channel _1
Receiver Positive Data Output for Channel _2
Receiver NRZ Data Output for Channel _2
Receiver Positive Data Output for Channel _3
Receiver NRZ Data Output for Channel _3
RTIP_0
RTIP_1
RTIP_2
RTIP_3
9
23
80
94
I
Receiver Differential Tip Positive Input for Channel _0
Positive differential receive input from the line.
Receiver Differential Tip Positive Input for Channel _1
Receiver Differential Tip Positive Input for Channel _2
Receiver Differential Tip Positive Input for Channel _3
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