TABLE
參數(shù)資料
型號(hào)： XRT83VL38IB-F
廠商： Exar Corporation
文件頁(yè)數(shù)： 76/95頁(yè)
文件大小： 0K
描述： IC LIU SH T1/E1/J1 OCTAL 225BGA
標(biāo)準(zhǔn)包裝： 84
類型： 線路接口裝置（LIU）
驅(qū)動(dòng)器/接收器數(shù)： 8/8
規(guī)程： E1
電源電壓： 3.14 V ~ 3.47 V
安裝類型： 表面貼裝
封裝/外殼： 225-BGA
供應(yīng)商設(shè)備封裝： 225-BGA（19x19）
包裝： 托盤
其它名稱： 1016-1481
XRT83VL38IB-F-ND
XRT83VL38
74
OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. 1.0.1
TABLE 39: MICROPROCESSOR REGISTER #128, BIT DESCRIPTION
REGISTER ADDRESS
10000000
NAME
FUNCTION
REGISTER
TYPE
RESET
VALUE
BIT #
D7
SR/DR
Single-rail/Dual-rail Select:
Writing a “1” to this bit configures
all 8 channels in the XRT83VL38 to operate in the Single-rail
mode.
Writing a “0” configures the XRT83VL38 to operate in Dual-rail
mode.
R/W
0
D6
ATAOS
Automatic Transmit All Ones Upon RLOS:
Writing a “1” to
this bit enables the automatic transmission of All "Ones" data
to the line for the channel that detects an RLOS condition.
Writing a “0” disables this feature.
R/W
0
D5
RCLKE
Receive Clock Edge:
Writing a “1” to this bit selects receive
output data of all channels to be updated on the negative edge
of RCLK.
Wring a “0” selects data to be updated on the positive edge of
RCLK.
R/W
0
D4
TCLKE
Transmit Clock Edge:
Writing a “0” to this bit selects transmit
data at TPOS_n/TDATA_n and TNEG_n/CODES_n of all
channels to be sampled on the falling edge of TCLK_n.
Writing a “1” selects the rising edge of the TCLK_n for sam-
pling.
R/W
0
D3
DATAP
DATA Polarity:
Writing a “0” to this bit selects transmit input
and receive output data of all channels to be active “High”.
Writing a “1” selects an active “Low” state.
R/W
0
D2
Reserved
0
D1
GIE
Global Interrupt Enable:
Writing a “1” to this bit globally
enables interrupt generation for all channels.
Writing a “0” disables interrupt generation.
R/W
0
D0
SRESET
Software Reset
P Registers: Writing a “1” to this bit longer
than 10s initiates a device reset through the microprocessor
interface. All internal circuits are placed in the reset state with
this bit set to a “1” except the microprocessor register bits.
R/W
0
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