
XRT83VL38
86
OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. 1.0.1
TABLE 55: AC ELECTRICAL CHARACTERISTICS
VDD=3.3V±5%, TA=25°C, UNLESS OTHERWISE SPECIFIED
PARAMETER
SYMBOL
MIN.
TYP.
MAX.
UNITS
E1 MCLK Clock Frequency
-
2.048
MHz
T1 MCLK Clock Frequency
-
1.544
MHz
MCLK Clock Duty Cycle
40
-
60
%
MCLK Clock Tolerance
-
±50
-
ppm
TCLK Duty Cycle
TCDU
30
50
70
%
Transmit Data Setup Time
TSU
50
-
ns
Transmit Data Hold Time
THO
30
-
ns
TCLK Rise Time(10%/90%)
TCLKR
-
40
ns
TCLK Fall Time(90%/10%)
TCLKF
-
40
ns
RCLK Duty Cycle
RCDU
45
50
55
%
Receive Data Setup Time
RSU
150
-
ns
Receive Data Hold Time
RHO
150
-
ns
RCLK to Data Delay
RDY
-
40
ns
RCLK Rise Time(10% to 90%) with
25pF Loading.
RCLKR
-
40
ns
RCLK Fall Time(90% to 10%) with
25pF Loading.
RCLKF
40
ns
FIGURE 35. TRANSMIT CLOCK AND INPUT DATA TIMING
TCLK
R
TCLK
F
TCLK
TPOS/TDATA
or
TNEG
T
SU
T
HO