參數(shù)資料
型號： XRT83VL38IB-F
廠商： Exar Corporation
文件頁數(shù)： 89/95頁
文件大?。?/td> 0K
描述： IC LIU SH T1/E1/J1 OCTAL 225BGA
標準包裝： 84
類型： 線路接口裝置（LIU）
驅(qū)動器/接收器數(shù)： 8/8
規(guī)程： E1
電源電壓： 3.14 V ~ 3.47 V
安裝類型： 表面貼裝
封裝/外殼： 225-BGA
供應商設備封裝： 225-BGA（19x19）
包裝： 托盤
其它名稱： 1016-1481
XRT83VL38IB-F-ND
XRT83VL38
5
REV. 1.0.1
OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
PIN DESCRIPTION BY FUNCTION
RECEIVE SECTIONS
SIGNAL NAME
LEAD #
TYPE
DESCRIPTION
RxON
K16
I
Receiver On - Harware Mode
Writing a “1” to this pin in Hardware mode turns on the Receive Sections of all chan-
nels. Writing a “0” shuts off the Receiver Sections of all channels.
RLOS_0
RLOS_1
RLOS_2
RLOS_3
RLOS_4
RLOS_5
RLOS_6
RLOS_7
C3
H4
H15
A16
V3
L2
J15
T15
O
Receiver Loss of Signal for Channel_ 0:
This output signal goes “High” for at least one RCLK_0 cycle to indicate loss of signal
at the receive 0 input. RLOS will remain “High” for the entire duration of the Loss of Sig-
nal detected by the receiver logic.
Receiver Loss of Signal for Channel _1
Receiver Loss of Signal for Channel _2
Receiver Loss of Signal for Channel _3
Receiver Loss of Signal for Channel _4
Receiver Loss of Signal for Channel_ 5
Receiver Loss of Signal for Channel _6
Receiver Loss of Signal for Channel _7
RCLK_0
RCLK_1
RCLK_2
RCLK_3
RCLK_4
RCLK_5
RCLK_6
RCLK_7
B3
H3
H16
A17
U3
L3
M15
U16
O
Receiver Clock Output for Channel _0
Receiver Clock Output for Channel _1
Receiver Clock Output for Channel _2
Receiver Clock Output for Channel _3
Receiver Clock Output for Channel _4
Receiver Clock Output for Channel _5
Receiver Clock Output for Channel _6
Receiver Clock Output for Channel _7
RNEG_0
LCV_0
RNEG_1
LCV_1
RNEG_2
LCV_2
RNEG_3
LCV_3
RNEG_4
LCV_4
RNEG_5
LCV_5
RNEG_6
LCV_6
RNEG_7
LCV_7
A2
H2
H18
B16
T4
M4
M16
V17
O
Receiver Negative Data Output for Channel_0 - Dual-Rail mode
This signal is the receive negative-rail output data.
Line Code Violation Output for Channel_0 - Single-Rail mode
This signal goes “High” for one RCLK_0 cycle to indicate a code violation is detected in
the received data of Channel _0. If AMI coding is selected, every bipolar violation
received will cause this pin to go “High”.
Receiver Negative Data Output for Channel _1
Line Code Violation Output for Channel _1
Receiver Negative Data Output for Channel _2
Line Code Violation Output for Channel _2
Receiver Negative Data Output for Channel _3
Line Code Violation Output for Channel _3
Receiver Negative Data Output for Channel _4
Line Code Violation Output for Channel _4
Receiver Negative Data Output for Channel _5
Line Code Violation Output for Channel _5
Receiver Negative Data Output for Channel _6
Line Code Violation Output for Channel _6
Receiver Negative Data Output for Channel _7
Line Code Violation Output for Channel _7
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