參數(shù)資料
型號(hào): XRT83VL38IB-F
廠商: Exar Corporation
文件頁數(shù): 80/95頁
文件大?。?/td> 0K
描述: IC LIU SH T1/E1/J1 OCTAL 225BGA
標(biāo)準(zhǔn)包裝: 84
類型: 線路接口裝置(LIU)
驅(qū)動(dòng)器/接收器數(shù): 8/8
規(guī)程: E1
電源電壓: 3.14 V ~ 3.47 V
安裝類型: 表面貼裝
封裝/外殼: 225-BGA
供應(yīng)商設(shè)備封裝: 225-BGA(19x19)
包裝: 托盤
其它名稱: 1016-1481
XRT83VL38IB-F-ND
XRT83VL38
77
REV. 1.0.1
OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
D6
TERCNTL
Termination Control.
In Host mode, setting this bit to “1” transfers the control of the
RXTSEL to the RXTSEL Hardware control pin.
NOTE: This provides a faster On/Off capability for redundancy
application.
R/W
0
D5-D0
Reserved
TABLE 42: MICROPROCESSOR REGISTER #131, BIT DESCRIPTION
REGISTER ADDRESS
10000011
NAME
FUNCTION
REGISTER
TYPE
RESET
VALUE
BIT #
D7
GAUGE1
Wire Gauge Selector Bit 1:
This bit together with bit D6 are used to select wire gauge size
as shown in the table below.
R/W
0
D6
GAUGE0
Wire Gauge Selector Bit 0:
See bit D7.
R/W
0
D5
TxSYNC(Sect
13)
G.703 Section 13 Transmit Pulse
When this bit is set to ’1’, the LIU transmitter will send the E1
synchrnonous waveform as described in Section 13 of ITU-T
G.703. This register bit takes priority over every other LIU set-
ting on the transmit path.
0 = Normal E1 pulse
1 = Section 13 Synchronous Pulse
R/W
0
D4
RxSYNC(Sect
13)
G.703 Section 13 Receiver
When this bit is set to ’1’, the CDR block of the receiver is con-
figured to accept a waveform as described in Section 13 of
ITU-T G.703.
0 = Normal E1 (Equalizer Bit Settings - EQC[4:0])
1 = Section 13 Synchronous Pulse
R/W
0
TABLE 41: MICROPROCESSOR REGISTER #130, BIT DESCRIPTION
GAUGE1
0
1
0
GAUGE0
0
1
0
1
Wire Size
22 and 24 Gauge
26 Gauge
24 Gauge
22 Gauge
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