參數(shù)資料
型號: XRT86VL34_1
廠商: Exar Corporation
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù): 24/63頁
文件大小: 402K
代理商: XRT86VL34_1
XRT86VL34
21
QUAD T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION
REV. V1.2.0
RxSERCLK0/
RxLINECLK0
RxSERCLK1/
RxLINECLK1
RxSERCLK2/
RxLINECLK2
RxSERCLK3/
RxLINECLK3
A7
D13
D15
T17
I/O
12
(Continued)
DS1 or E1 Framer Bypass Mode - RxLINECLKn
In this mode, RxSERCLKn is used as the Receive Line Clock
output pin (RxLineClk) from the LIU.
N
OTE
:
These 8 pins are internally pulled “High” for each
channel.
RxSER0/
RxPOS0
RxSER1/
RxPOS1
RxSER2/
RxPOS2
RxSER3/
RxPOS3
D6
A15
J18
U17
O
12
Receive Serial Data Output (RxSERn):
The exact function of these pins depends on the mode of oper-
ation selected, as described below.
DS1/E1 Mode - RxSERn
These pins function as the receive serial data output on the
system side interface, which updates on the rising edge of the
RxSERCLKn pin. All the framing alignment bits, facility data link
bits, CRC bits, and signaling information will also be extracted
to this output pin.
DS1 or E1 High-Speed Multiplexed Mode* - RxSERn
In this mode, these pins are used as the high-speed multi-
plexed data output pin on the system side. High-speed multi-
plexed data of channels 0-3 will output on RxSER0 in a byte or
bit-interleaved way. The framer outputs the multiplexed data on
RxSER0 using the high-speed input clock (RxSERCLKn).
DS1 or E1 Framer Bypass Mode
In this mode, RxSERn is used as the positive digital output pin
(RxPOSn) from the LIU.
N
OTE
:
*High-speed multiplexed modes include (For T1/E1)
16.384MHz HMVIP, H.100, Bit-multiplexed modes, and
(For T1 only) 12.352MHz Bit-multiplexed mode.
N
OTE
:
In DS1 high-speed modes, the DS-0 data is mapped
into an E1 frame by ignoring every fourth time slot
(don’t care).
RECEIVE SYSTEM SIDE INTERFACE
S
IGNAL
N
AME
B
ALL
#
T
YPE
O
UTPUT
D
RIVE
(
M
A)
D
ESCRIPTION
相關(guān)PDF資料
PDF描述
XRT86VL34 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
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