- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄376464 > XRT86VL34_1 (Exar Corporation) Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 PDF資料下載
參數(shù)資料
| 型號： | XRT86VL34_1 |
| 廠商： | Exar Corporation |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 中文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 文件頁數(shù)： | 35/63頁 |
| 文件大?。?/td> | 402K |
| 代理商： | XRT86VL34_1 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁當(dāng)前第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁
XRT86VL34
32
REV. V1.2.0
QUAD T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION
REQ1
R3
O
8
DMA Cycle Request Output—DMA Controller 1 (Read):
These output pins are used to indicate that DMA transfers
(Read) are requested by the T1/E1 Framer.
On the receive side (i.e., To transmit data from HDLC buffers
within the XRT86VL34 to external DMA Controller), DMA trans-
fers are only requested when the receive buffer contains a
complete message or cell.
The DMA Read cycle starts by T1/E1 Framer asserting the
DMA Request (REQ1) ‘low’, then the external DMA controller
should drive the DMA Acknowledge (ACK1) ‘low’ to indicate
that it is ready to receive the data. The T1/E1 Framer should
place new data on the Microprocessor data bus each time the
Read Signal is Strobed low if the RD is configured as a Read
Strobe. If RD is configured as a direction signal, then the T1/E1
Framer would place new data on the Microprocessor data bus
each time the Write Signal (WR) is Strobed low.
The Framer asserts this output pin (toggles it "Low") when one
of the Receive HDLC buffer contains a complete HDLC mes-
sage that needs to be read by the μC/μP.
The Framer negates this output pin (toggles it “High”) when the
Receive HDLC buffers are depleted.
INT
R8
O
8
Interrupt Request Output:
This active-low output signal will be asserted when the
XRT86VL34 device is requesting interrupt service from the
Microprocessor. This output pin should typically be connected
to the “Interrupt Request” input of the Microprocessor.
The Framer will assert this active "Low" output (toggles it "Low"),
to the local μP, anytime it requires interrupt service.
PCLK
V1
I
-
Microprocessor Clock Input:
This clock input signal is only used if the Microprocessor Inter-
face has been configured to operate in the Synchronous
Modes (e.g., Power PC 403 Mode). If the Microprocessor Inter-
face is configured to operate in this mode, then it will use this
clock signal to do the following.
1.
To sample the CS*, WR*/R/W*, A[14:0], D[7:0], RD*/DS*
and DBEN input pins, and
2.
To update the state of the D[7:0] and the RDY/DTACK
output signals.
N
OTES
:
1.
The Microprocessor Interface can work with PCLK
frequencies ranging up to 33MHz.
2.
This pin is inactive if the user has configured the
Microprocessor Interface to operate in either the Intel-
Asynchronous or the Motorola-Asynchronous Modes.
In this case, the user should tie this pin to GND.
When DMA interface is enabled, the PCLK input pin is also
used by the T1/E1 Framer to latch in or latch out receive or out-
put data respectively.
iADDR
U1
I
-
This Pin Must be Tied “Low” for Normal Operation.
This pin is internally pulled “High” with a 50k
Ω
resistor.
MICROPROCESSOR INTERFACE
S
IGNAL
N
AME
B
ALL
#
T
YPE
O
UTPUT
D
RIVE
(
M
A)
D
ESCRIPTION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRT86VL34 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| XRT86VL34_2 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| XRT86VL34IB | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| XRT86VL38_2 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| XRT86VL38IB | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT86VL34ES | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| XRT86VL34IB | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 4 IND FULL DPLX FIFO TWO-FRAME, CAS, CCS RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| XRT86VL34IB-F | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 4-Ch T1/E1/J1 RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| XRT86VL38 | 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION |
| XRT86VL38_07 | 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。