參數(shù)資料
型號(hào): XRT91L80IB
廠商: EXAR CORP
元件分類: 數(shù)字傳輸電路
英文描述: 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
中文描述: TRANSCEIVER, PBGA196
封裝: 12 X 12 MM, STBGA-196
文件頁數(shù): 38/45頁
文件大?。?/td> 359K
代理商: XRT91L80IB
XRT91L80
2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
PRELIMINARY
xr
REV. P1.1.0
36
D5
Reserved
This Register Bit is Not Used
X
X
D4
Reserved
This Register Bit is Not Used
X
X
D3
Reserved
This Register Bit is Not Used
X
X
D2
DLOOP
Digital Local Loopback
Digital local loopback allows the transmit input pins to be looped
back to the receive output pins for local diagnostics. The transmit
serial data output is valid during the digital loopback.
"0" = Disabled
"1" = Enable Digital Local Loopback
N
OTE
:
DLOOP and RLOOPS can be enabled simultaneously to
achieve a dual loopback diagnostic feature.
R/W
0
D1
RLOOPS
Serial Remote Loopback
Serial remote loopback allows the receive serial input pins to be
looped back to the transmit serial output pins for remote diagnos-
tics. The receive data output is valid during a serial remote loop-
back.
"0" = Disabled
"1" = Enable Remote Serial Loopback
N
OTE
:
DLOOP and RLOOPS can be enabled simultaneously to
achieve a dual loopback diagnostic feature.
R/W
0
D0
RLOOPP
Parallel Remote Loopback
Parallel remote loopback has the same affect as the serial remote
loopback, except that the data input is allowed to pass through the
SIPO before it’s looped back to the transmit path, wherein it
passes through the transmit FIFO, through the PISO, and back out
the transmit serial output. The receive data output is valid during a
parallel remote loopback.
"0" = Disabled
"1" = Enable Remote Parallel Loopback
N
OTE
:
DLOOP and RLOOPS should be
disabled
when RLOOPP
is enabled. The internal FIFO should also be flushed using
FIFO_RST when parallel remote loopback is enabled/
disabled.
R/W
0
D
IAGNOSTIC
C
ONTROL
R
EGISTER
(0
X
05
H
)
B
IT
N
AME
F
UNCTION
Register
Type
Default
Value
(HW reset)
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