參數(shù)資料
型號： XRT91L80IB
廠商： EXAR CORP
元件分類： 數(shù)字傳輸電路
英文描述： 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
中文描述： TRANSCEIVER, PBGA196
封裝： 12 X 12 MM, STBGA-196
文件頁數(shù)： 44/45頁
文件大?。?/td> 359K
代理商： XRT91L80IB
XRT91L80
2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
PRELIMINARY
xr
REV. P1.1.0
42
REVISION HISTORY
R
EVISION
#
D
ATE
D
ESCRIPTION
P1.0.0
October 2004
1st release of the XRT91L80 product brief
P1.0.1
October 2004
Fixed typos throughout document
P1.0.2
October 2004
Fixed typos throughout document
P1.0.3
January 2005
Added jitter transfer and tolerance mask test results and phase noise transmit jitter
generation results, added CS de-assertion note on section 5.1, fixed register 0x02,
0x04, 0x05 microprocessor bit descriptions, updated pin descriptions, corrected ’fall-
ing edge’ typo in section 3.6 to ’rising edge’, and enhanced receive and transmit
interface block diagrams.
P1.0.4
March 2005
Remove ’RXSEL’ reference on the RXIP/N pin description. Minor edit in receive sec-
tion 2.0. FIFO_RST corrected for active High in section 3.4. Removed unsupported
note for transparent mode FIFO operation in section 3.3.
P1.0.5
April 2005
1.Design change: Renamed DISRD, TRIRXD, and TRITXCLKO16P/N to LOSD-
MUTE, DISRD, and TXCLKO16DIS respectively. Corrected and redefined pin defini-
tions for LOSDMUTE, DISRD, and TXCLKO16DIS.
2.Renamed LOSEXT, REFFREQSEL, TXCLKIP/N, RXCLKP/N, RXD[3:0]P/N,
RXCLK16P/N, LPTIME_JA, LPTIME_NO_JA, RXP/N to SDEXT, ALTFREQSEL,
TXPCLKIP/N, RXPCLKOP/N, RXDO[3:0]P/N, RXCLKO16P/N, LOOPTM_JA,
LOOPTM_NOJA, XRES1P/N respectively.
3.Updated STBGA pinout names to include above mentioned changes.
4.Corrected LOOPBW and RLOOPP pin descriptions.
5.Corrected RXDO[3:0]P/N description error from ’updated on rising edge’ to
’updated on falling edge’ of RXPCLKOP/N.
5.Updated and improved all pin list decriptions and formatted table headers.
6.Added JTAG input pin pull-up and pull-down descriptions.
7.Removed unsupported note for transparent mode FIFO operation in section 3.3
and enhanced and corrected FIFO reset operation description.
8.Moved FIFO Figure 11 from sect 3.6 to section 3.3.
9.Corrected Figure 13, “Loop Timing Mode Using an External Cleanup VCXO.
10.Corrected Loopback definition errors in Section 4.0.
11.Significantly enhanced Sec. 2.3 "LOS" to "External Signal Detection, Sec. 3.3
Transmit FIFO, and Sec. 3.6 CMU and Retimer, and Sec. 3.7 Loop timing and Clock
Control.
12.Enhanced Transmit/Receive Parallel Data and Clock Input/Output timing diagram
and tables.
13.Added CMU and CDR performace tables.
14.Added CML input swing characteristics table.
15.Added LOSD declaration polarity setting tables.
16.Added LVDS biasing resistor diagram.
17.Reformatted and Enhanced AC/DC electrical characteristics tables.
18.Change MHz to Mbps to reflect Parallel data I/O and Serial I/O more accurately.
Corrected and enhanced PISO and SIPO diagrams.
19.Removed all reference to "differential limiting amplifier" and TXO2P/N pins.
20.Updated Microprocessor Register Bits and Descriptions to reflect changes.
21.Added Microprocessor Register Names.
22.Retouched 91L80 Block Diagram.
23.Changed OC-48 name to STS-48.
24.Minor edits and spelling and grammatical corrections.
相關(guān)PDF資料
PDF描述
XRT91L81 2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L81IB 2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L82 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L82IB 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
XRT94L31_07 3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT91L80IB-F 功能描述:總線收發(fā)器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
XRT91L81 制造商:EXAR 制造商全稱:EXAR 功能描述:2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L81IB 制造商:EXAR 制造商全稱:EXAR 功能描述:2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L82 制造商:EXAR 制造商全稱:EXAR 功能描述:2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L82ES 功能描述:總線收發(fā)器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*